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Timing Verification in Transaction Modeling: Timing Verification in Transaction Modeling - Couverture souple

Tsikhanovich, Alena

 
9783843386944: Timing Verification in Transaction Modeling: Timing Verification in Transaction Modeling
Couverture souple
ISBN 10 : 3843386943 ISBN 13 : 9783843386944
Editeur : LAP LAMBERT Academic Publishing, 2011

Synopsis

Hardware/Software (Hw/Sw) systems are likely to become essential in all aspects of everyday life. However, the productive design of these systems is limited by several factors, some of them being the increasing complexity of applications, the heterogeneous nature of products and services as well as the shrinking of the time-to-market delay. Transaction Level Modeling (TLM) paradigm is considered as one of the most promising simulation paradigms to break down the design complexity by allowing the exploration and validation of design alternatives at high levels of abstraction. This research proposes a timing expression methodology in Transation Level Models based on temporal constraints analysis. We propose to use a combination of two paradigms to accelerate the design process: TLM on one hand and a methodology to express timing between different transactions on the other hand. As there are many definitions of TLM with several pro and contra, in the context of our research we define a hardware/software (Hw/Sw) specification and simulation methodology which supports TLM in such a way that several modeling concepts can be seen separately.

Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.

Présentation de l'éditeur

Hardware/Software (Hw/Sw) systems are likely to become essential in all aspects of everyday life. However, the productive design of these systems is limited by several factors, some of them being the increasing complexity of applications, the heterogeneous nature of products and services as well as the shrinking of the time-to-market delay. Transaction Level Modeling (TLM) paradigm is considered as one of the most promising simulation paradigms to break down the design complexity by allowing the exploration and validation of design alternatives at high levels of abstraction. This research proposes a timing expression methodology in Transation Level Models based on temporal constraints analysis. We propose to use a combination of two paradigms to accelerate the design process: TLM on one hand and a methodology to express timing between different transactions on the other hand. As there are many definitions of TLM with several pro and contra, in the context of our research we define a hardware/software (Hw/Sw) specification and simulation methodology which supports TLM in such a way that several modeling concepts can be seen separately.

Biographie de l'auteur

Alena Tsikhanovich obtained a Ph.D. in computer science from the University of Montreal in 2010.Her current research interests are related to the domains of hardware/software system modeling, simulation and verification.

Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.

Éditeur
LAP LAMBERT Academic Publishing
Date d'édition
2011
Langue
anglais
ISBN 10 
3843386943
ISBN 13 
9783843386944
Reliure
Broché
Nombre de pages
136
Coordonnées du fabricant
non disponible
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