Interfacing Techniques for SoCs with Multiple Clock Domains (MCD): To Address the Challenges in Modern Deep Sub-Micron Technologies - Couverture souple

Hasan, Syed Rafay; Savaria, Yvon; Ahmad, M.Omair

 
9783844315943: Interfacing Techniques for SoCs with Multiple Clock Domains (MCD): To Address the Challenges in Modern Deep Sub-Micron Technologies
Couverture souple
ISBN 10 : 3844315942 ISBN 13 : 9783844315943
Editeur : LAP LAMBERT Academic Publishing, 2011

Synopsis

This book initially provides quantitative analysis of the severity of timing constraints associated with global synchrony in modern DSM technologies. Then it shows that different processing elements may work in different clock domains to alleviate these constraints, hence giving rise to MCDs in SoC. Modules in such SoCs are mutually asynchronous and these systems are called as Globally Asynchronous Locally Synchronous (GALS). Some interfacing strategy is required to communicate these mutually asynchronous elements. The asynchronous GALS interfaces are conventionally described at the RTL or system level. Hence crosstalk glitches susceptibility cannot be addressed at protocol development stage. This work contributes in identifying, modeling and quenching these crosstalk glitches using an analytical modeling technique. The proposed technique provides basis of a framework to the designer to verify the asynchronous protocols against crosstalk glitches at behavioral level. In the last part of the book loosely synchronous interfacing strategies are discussed. Some new techniques are introduced that alleviates the clock skew using novel clock scheduling techniques.

Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.

Présentation de l'éditeur

This book initially provides quantitative analysis of the severity of timing constraints associated with global synchrony in modern DSM technologies. Then it shows that different processing elements may work in different clock domains to alleviate these constraints, hence giving rise to MCDs in SoC. Modules in such SoCs are mutually asynchronous and these systems are called as Globally Asynchronous Locally Synchronous (GALS). Some interfacing strategy is required to communicate these mutually asynchronous elements. The asynchronous GALS interfaces are conventionally described at the RTL or system level. Hence crosstalk glitches susceptibility cannot be addressed at protocol development stage. This work contributes in identifying, modeling and quenching these crosstalk glitches using an analytical modeling technique. The proposed technique provides basis of a framework to the designer to verify the asynchronous protocols against crosstalk glitches at behavioral level. In the last part of the book loosely synchronous interfacing strategies are discussed. Some new techniques are introduced that alleviates the clock skew using novel clock scheduling techniques.

Biographie de l'auteur

Syed Rafay Hasan received the B.Eng in electrical engineering from NED University of Engineering and Technology, Pakistan in 1997. He also received the M.Eng and Ph.D. in electrical engineering from Concordia University, Montreal in 2002 and 2009, respectively. Currently he is a research associate at École Polytechnique de Montréal.

Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.

Éditeur
LAP LAMBERT Academic Publishing
Date d'édition
2011
Langue
anglais
ISBN 10 
3844315942
ISBN 13 
9783844315943
Reliure
Broché
Nombre de pages
264
Coordonnées du fabricant
non disponible
Personne responsable
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