Over the last years,researchers are searching for new low power solutions for VLSI circuits.This work focuses on reducing power dissipation,which is showing ever increasing growth with scaling down of technologies.Various techniques at different levels of design process have been implemented to reduce the power dissipation at circuit, architectural & system level.Furthermore,number of gates/chip area is constantly increasing,while switching energy does not decrease at same rate,so power dissipation rises becomes more difficult and expensive.Then, to limit the power dissipation, alternative solutions at each level of abstraction are proposed.The dynamic power requirement of CMOS circuits is rapidly becoming a major concern in the design of personal information systems and large computers.This work focuses on a new CMOS logic family called ADIABATIC LOGIC, based on the adiabatic switching principle.The adiabatic logic structure dramatically reduces the power dissipation.Adiabatic logic offers a way to reuse the energy stored in the load capacitors rather than the traditional way of discharging the load capacitors to the ground and wasting this energy.
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Sanjay Kumar obtained his B.E.(ECE) from Meerut University, India. He obtained M.Tech.(VLSI Design & CAD) from Thapar University, Patiala, worked in VLSI Circuit Design.From 2006, he started his research career in Indian Space Research Organization, India. Presently, he is working as an Assistant Professor in Thapar University, Patiala, India.
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Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Over the last years,researchers are searching for new low power solutions for VLSI circuits.This work focuses on reducing power dissipation,which is showing ever increasing growth with scaling down of technologies.Various techniques at different levels of design process have been implemented to reduce the power dissipation at circuit, architectural & system level.Furthermore,number of gates/chip area is constantly increasing,while switching energy does not decrease at same rate,so power dissipation rises becomes more difficult and expensive.Then, to limit the power dissipation, alternative solutions at each level of abstraction are proposed.The dynamic power requirement of CMOS circuits is rapidly becoming a major concern in the design of personal information systems and large computers.This work focuses on a new CMOS logic family called ADIABATIC LOGIC, based on the adiabatic switching principle.The adiabatic logic structure dramatically reduces the power dissipation.Adiabatic logic offers a way to reuse the energy stored in the load capacitors rather than the traditional way of discharging the load capacitors to the ground and wasting this energy. 124 pp. Englisch. N° de réf. du vendeur 9783844320916
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Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: KUMAR SANJAYSanjay Kumar obtained his B.E.(ECE) from Meerut University, India. He obtained M.Tech.(VLSI Design & CAD) from Thapar University, Patiala, worked in VLSI Circuit Design.From 2006, he started his research career in Indi. N° de réf. du vendeur 5472530
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Taschenbuch. Etat : Neu. This item is printed on demand - Print on Demand Titel. Neuware -Over the last years,researchers are searching for new low power solutions for VLSI circuits.This work focuses on reducing power dissipation,which is showing ever increasing growth with scaling down of technologies.Various techniques at different levels of design process have been implemented to reduce the power dissipation at circuit, architectural & system level.Furthermore,number of gates/chip area is constantly increasing,while switching energy does not decrease at same rate,so power dissipation rises becomes more difficult and expensive.Then, to limit the power dissipation, alternative solutions at each level of abstraction are proposed.The dynamic power requirement of CMOS circuits is rapidly becoming a major concern in the design of personal information systems and large computers.This work focuses on a new CMOS logic family called ADIABATIC LOGIC, based on the adiabatic switching principle.The adiabatic logic structure dramatically reduces the power dissipation.Adiabatic logic offers a way to reuse the energy stored in the load capacitors rather than the traditional way of discharging the load capacitors to the ground and wasting this energy.VDM Verlag, Dudweiler Landstraße 99, 66123 Saarbrücken 124 pp. Englisch. N° de réf. du vendeur 9783844320916
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Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Over the last years,researchers are searching for new low power solutions for VLSI circuits.This work focuses on reducing power dissipation,which is showing ever increasing growth with scaling down of technologies.Various techniques at different levels of design process have been implemented to reduce the power dissipation at circuit, architectural & system level.Furthermore,number of gates/chip area is constantly increasing,while switching energy does not decrease at same rate,so power dissipation rises becomes more difficult and expensive.Then, to limit the power dissipation, alternative solutions at each level of abstraction are proposed.The dynamic power requirement of CMOS circuits is rapidly becoming a major concern in the design of personal information systems and large computers.This work focuses on a new CMOS logic family called ADIABATIC LOGIC, based on the adiabatic switching principle.The adiabatic logic structure dramatically reduces the power dissipation.Adiabatic logic offers a way to reuse the energy stored in the load capacitors rather than the traditional way of discharging the load capacitors to the ground and wasting this energy. N° de réf. du vendeur 9783844320916
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Taschenbuch. Etat : Neu. LOW POWER VLSI CIRCUIT DESIGN | ADIABATIC CHARGING SWITCHING PRINCIPLE | Sanjay Kumar | Taschenbuch | 124 S. | Englisch | 2011 | LAP LAMBERT Academic Publishing | EAN 9783844320916 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu. N° de réf. du vendeur 107016619
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