Instead of the costly RFID reader, WNIC can be used to communicate with the RFID transponder. However, the memory block, which is one of the major parts in RFID transponder, has to be redesigned. This book is concentrated on designing an improved CMOS Sense Amplifier (SA) and Charge Pump (CP) circuits, which are compatible for readerless RFID transponder EEPROM. Memory read access time; power dissipation and the reliability of an EEPROM are strongly influenced by the performance of the SA. Moreover, to reduce the continuous power supply in integrated circuits, CP circuit is widely used to direct charge flow and to generate boosted output voltage higher than VDD in EEPROM. The SA is designed to work in low voltage while the CP is designed for achieving low power, free from threshold voltage loss and parasitic capacitance effect. Mentor Graphics EldoSpice software package is used to simulate the circuitry. The entire design of the row decoder, SA and clock generator are based on 0.18-μm CMOS process. Therefore, the design of the SA and the CP circuits are better suited for low power read and write operation in EEPROM, which will be compatible with the readerless RFID transponder.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
Labonnah Farzana Rahman was born in Bangladesh in 1983. She received her B.Sc. (Eng.) in Computer Science and Engineering from Shah Jalal University of Science and Technology, Sylhet, Bangladesh in 2006. Currently she is doing her Ph.D. in VLSI; design of readerless RFID transponder systems in Universiti Kebangsaan Malaysia.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
Vendeur : moluna, Greven, Allemagne
Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Rahman Labonnah FarzanaLabonnah Farzana Rahman was born in Bangladesh in 1983. She received her B.Sc. (Eng.) in Computer Science and Engineering from Shah Jalal University of Science and Technology, Sylhet, Bangladesh in 2006. Curren. N° de réf. du vendeur 5480532
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Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Instead of the costly RFID reader, WNIC can be used to communicate with the RFID transponder. However, the memory block, which is one of the major parts in RFID transponder, has to be redesigned. This book is concentrated on designing an improved CMOS Sense Amplifier (SA) and Charge Pump (CP) circuits, which are compatible for readerless RFID transponder EEPROM. Memory read access time; power dissipation and the reliability of an EEPROM are strongly influenced by the performance of the SA. Moreover, to reduce the continuous power supply in integrated circuits, CP circuit is widely used to direct charge flow and to generate boosted output voltage higher than VDD in EEPROM. The SA is designed to work in low voltage while the CP is designed for achieving low power, free from threshold voltage loss and parasitic capacitance effect. Mentor Graphics EldoSpice software package is used to simulate the circuitry. The entire design of the row decoder, SA and clock generator are based on 0.18- m CMOS process. Therefore, the design of the SA and the CP circuits are better suited for low power read and write operation in EEPROM, which will be compatible with the readerless RFID transponder. N° de réf. du vendeur 9783845403779
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Taschenbuch. Etat : Neu. Low Power Sense Amplifier & Charge Pump Circuits for Readerless RFID | Labonnah Farzana Rahman (u. a.) | Taschenbuch | Englisch | LAP Lambert Academic Publishing | EAN 9783845403779 | Verantwortliche Person für die EU: LAP Lambert Academic Publishing, Brivibas Gatve 197, 1039 RIGA, LETTLAND, customerservice[at]vdm-vsg[dot]de | Anbieter: preigu. N° de réf. du vendeur 106128505
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