Articles liés à Low Power Flash ADC: VLSI Technology
Synopsis
In this project, a new design for a low power CMOS flash Analog-to-Digital Converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1 GHz, is implemented in a 1.2 V analog supply voltage. Microwind simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes about 72 mW in a commercial 90 nm CMOS process. The new design offers lower number of comparators and lower power consumption compared with the traditional flash ADC.
Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.
Présentation de l'éditeur
In this project, a new design for a low power CMOS flash Analog-to-Digital Converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1 GHz, is implemented in a 1.2 V analog supply voltage. Microwind simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes about 72 mW in a commercial 90 nm CMOS process. The new design offers lower number of comparators and lower power consumption compared with the traditional flash ADC.
Biographie de l'auteur
It describes how to design a low power flash ADC which gives high speed,low cost&less complexity rather than conventional flash ADC.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
Acheter neuf
Afficher cet article
EUR 41,05
EUR 9,70 expédition depuis Allemagne vers France
Destinations, frais et délaisRésultats de recherche pour Low Power Flash ADC: VLSI Technology
Image fournie par le vendeur
Low Power Flash ADC
Edité par
LAP LAMBERT Academic Publishing, 2011
ISBN 10 : 3845440848
ISBN 13 : 9783845440842
Neuf
Couverture souple
Vendeur : moluna, Greven, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Subba Reddy MurraIt describes how to design a low power flash ADC which gives high speed,low cost&less complexity rather than conventional flash ADC.In this project, a new design for a low power CMOS flash Analog-to-Digital Conve. N° de réf. du vendeur 5482784
Quantité disponible : Plus de 20 disponibles
Image fournie par le vendeur
Low Power Flash ADC : VLSI Technology
Edité par
LAP LAMBERT Academic Publishing, 2012
ISBN 10 : 3845440848
ISBN 13 : 9783845440842
Neuf
Taschenbuch
Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - In this project, a new design for a low power CMOS flash Analog-to-Digital Converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1 GHz, is implemented in a 1.2 V analog supply voltage. Microwind simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes about 72 mW in a commercial 90 nm CMOS process. The new design offers lower number of comparators and lower power consumption compared with the traditional flash ADC. N° de réf. du vendeur 9783845440842
Quantité disponible : 1 disponible(s)
Image fournie par le vendeur
Low Power Flash ADC
Edité par
LAP LAMBERT Academic Publishing Aug 2011, 2011
ISBN 10 : 3845440848
ISBN 13 : 9783845440842
Neuf
Taschenbuch
Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -In this project, a new design for a low power CMOS flash Analog-to-Digital Converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1 GHz, is implemented in a 1.2 V analog supply voltage. Microwind simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes about 72 mW in a commercial 90 nm CMOS process. The new design offers lower number of comparators and lower power consumption compared with the traditional flash ADC. 80 pp. Englisch. N° de réf. du vendeur 9783845440842
Quantité disponible : 2 disponible(s)
Image fournie par le vendeur
Low Power Flash ADC
Edité par
LAP LAMBERT Academic Publishing Aug 2011, 2011
ISBN 10 : 3845440848
ISBN 13 : 9783845440842
Neuf
Taschenbuch
Vendeur : buchversandmimpf2000, Emtmannsberg, BAYE, Allemagne
Évaluation du vendeur 5 sur 5 étoiles
Taschenbuch. Etat : Neu. Neuware -In this project, a new design for a low power CMOS flash Analog-to-Digital Converter (ADC) is proposed. A 6-bit flash ADC, with a maximum acquisition speed of 1 GHz, is implemented in a 1.2 V analog supply voltage. Microwind simulation results for the proposed flash ADC verifying the analytical results are also given. It shows that the proposed 6-bit flash ADC consumes about 72 mW in a commercial 90 nm CMOS process. The new design offers lower number of comparators and lower power consumption compared with the traditional flash ADC.Books on Demand GmbH, Überseering 33, 22297 Hamburg 80 pp. Englisch. N° de réf. du vendeur 9783845440842
Quantité disponible : 2 disponible(s)