A Management Paradigm for FPGA Design Flow Acceleration: Creating a framework for vendor independent representation of FPGA designs - Couverture souple

Tavaragiri, Abhay; Athanas, Peter M.

 
9783846503201: A Management Paradigm for FPGA Design Flow Acceleration: Creating a framework for vendor independent representation of FPGA designs
Couverture souple
ISBN 10 : 3846503207 ISBN 13 : 9783846503201
Editeur : LAP LAMBERT Academic Publishing, 2011

Synopsis

Advances in FPGA density and complexity have not been matched by a corresponding improvement in the performance of the implementation tools. Knowledge of incremental changes in a design can lead to fast turnaround times for implementing even large designs. A high-level overview of an incremental productivity flow, focusing on the back-end FPGA design is provided in this book. This book presents a management paradigm that is used to capture the design specific information in a format that is reusable across the entire design process. A C++ based internal data structure stores all the information, whereas XML is used to provide an external view of the design data. This work provides a vendor independent, universal format for representing the logical and physical information associated with FPGA designs.

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Présentation de l'éditeur

Advances in FPGA density and complexity have not been matched by a corresponding improvement in the performance of the implementation tools. Knowledge of incremental changes in a design can lead to fast turnaround times for implementing even large designs. A high-level overview of an incremental productivity flow, focusing on the back-end FPGA design is provided in this book. This book presents a management paradigm that is used to capture the design specific information in a format that is reusable across the entire design process. A C++ based internal data structure stores all the information, whereas XML is used to provide an external view of the design data. This work provides a vendor independent, universal format for representing the logical and physical information associated with FPGA designs.

Biographie de l'auteur

Abhay Tavaragiri received his B.E degree in Electronics and Communication from the Delhi College of Engineering in 2007 and his Master's degree in Computer Engineering from Virginia Tech in 2011. He is currently working as a design engineer at Intel Corporation,Hillsboro. His interests include FPGA/ASIC design and design automation.

Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.

Éditeur
LAP LAMBERT Academic Publishing
Date d'édition
2011
Langue
anglais
ISBN 10 
3846503207
ISBN 13 
9783846503201
Reliure
Broché
Nombre de pages
92
Coordonnées du fabricant
non disponible
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