Low Power Interface Circuits between Adiabatic and Standard CMOS Logic: A Design Perspective - Couverture souple

Arora, Neha; Singh, B. P.

 
9783846552599: Low Power Interface Circuits between Adiabatic and Standard CMOS Logic: A Design Perspective
Couverture souple
ISBN 10 : 3846552593 ISBN 13 : 9783846552599
Editeur : LAP LAMBERT Academic Publishing, 2011

Synopsis

The clocking schemes and signal waveforms of Adiabatic Circuits are different from those of Standard CMOS circuits. The Adiabatic Logic and Standard CMOS circuits do exist on a single chip to utilize the strength of both approaches. The interface circuits that convert signals between Adiabatic Logic and Standard CMOS circuits are inherent requirement. The text investigates design approaches of Adiabatic- CMOS and CMOS- Adiabatic interface circuits. Several new low power Adiabatic-CMOS and CMOS-Adiabatic interfaces are introduced in this text. Tanner EDA tool on BSIM3V3 90nm and 130nm CMOS technologies has been used to calculate the power consumption and power delay product of various circuits over temperature, frequencies and power supply voltages. The comparison of proposed approaches has been done with the all other approaches available in the literature on various circuit parameters. The write up concludes the efficient design approaches for interface circuits in terms of power consumption and power delay product.

Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.

Présentation de l'éditeur

The clocking schemes and signal waveforms of Adiabatic Circuits are different from those of Standard CMOS circuits. The Adiabatic Logic and Standard CMOS circuits do exist on a single chip to utilize the strength of both approaches. The interface circuits that convert signals between Adiabatic Logic and Standard CMOS circuits are inherent requirement. The text investigates design approaches of Adiabatic- CMOS and CMOS- Adiabatic interface circuits. Several new low power Adiabatic-CMOS and CMOS-Adiabatic interfaces are introduced in this text. Tanner EDA tool on BSIM3V3 90nm and 130nm CMOS technologies has been used to calculate the power consumption and power delay product of various circuits over temperature, frequencies and power supply voltages. The comparison of proposed approaches has been done with the all other approaches available in the literature on various circuit parameters. The write up concludes the efficient design approaches for interface circuits in terms of power consumption and power delay product.

Biographie de l'auteur

Neha Arora received the B.E. degree in ECE from Rajasthan University, India, in 2007, and completed the academics of M.Tech in VLSI Design from FET, MITS in 2010. She is working as Assistant Professor in the Department of ECE, from 2007 to till date at Mody Institute of Technology & Science, Lakshmangarh (Deemed University), Rajasthan (INDIA).

Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.

Éditeur
LAP LAMBERT Academic Publishing
Date d'édition
2011
Langue
anglais
ISBN 10 
3846552593
ISBN 13 
9783846552599
Reliure
Broché
Nombre de pages
72
Coordonnées du fabricant
non disponible
Personne responsable
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