ASIC Implementation of Low Power FP-AU using Reversible Logic: Floating Point (FP)-Arithmetic Units (AU) - Couverture souple

Krishnasamy Natarajan, Vijeyakumar ; Sundaram, Kalaiselvi ; Bojan, Vinoth Kumar

9786139587056: ASIC Implementation of Low Power FP-AU using Reversible Logic: Floating Point (FP)-Arithmetic Units (AU)

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ISBN 10 : 6139587050 ISBN 13 : 9786139587056

Editeur : LAP LAMBERT Academic Publishing, 2018

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This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work.

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�diteur: LAP LAMBERT Academic Publishing
Date d'�dition: 2018
Langue: anglais
ISBN 10: 6139587050
ISBN 13: 9786139587056
Reliure: Broch�
Nombre de pages: 52
Coordonn�es du fabricant: non disponible
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ASIC Implementation of Low Power FP-AU using Reversible Logic

Vijeyakumar Krishnasamy Natarajan

Edit� par LAP LAMBERT Academic Publishing Apr 2018, 2018

ISBN 10 : 6139587050 ISBN 13 : 9786139587056

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Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work. 52 pp. Englisch. N� de r�f. du vendeur 9786139587056

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ASIC Implementation of Low Power FP-AU using Reversible Logic: Floating Point (FP)-Arithmetic Units (AU)

Krishnasamy Natarajan, Vijeyakumar/ Sundaram, Kalaiselvi/ Bojan, Vinoth kumar

Edit� par LAP LAMBERT Academic Publishing, 2018

ISBN 10 : 6139587050 ISBN 13 : 9786139587056

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Paperback. Etat : Brand New. 52 pages. 8.66x5.91x0.12 inches. In Stock. N� de r�f. du vendeur zk6139587050

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ASIC Implementation of Low Power FP-AU using Reversible Logic

Vijeyakumar Krishnasamy Natarajan|Kalaiselvi Sundaram|Vinoth kumar Bojan

Edit� par LAP LAMBERT Academic Publishing, 2018

ISBN 10 : 6139587050 ISBN 13 : 9786139587056

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Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Autor/Autorin: Krishnasamy Natarajan VijeyakumarDr.K.N. Vijeyakumar is working as an Associate Professor in Dr.Mahalingam College of Engineering and Technology, Coimbatore, Tamilnadu. His area of interest include ASIC design, low power VLSI design. N� de r�f. du vendeur 385865002

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ASIC Implementation of Low Power FP-AU using Reversible Logic

Vijeyakumar Krishnasamy Natarajan

Edit� par LAP LAMBERT Academic Publishing Apr 2018, 2018

ISBN 10 : 6139587050 ISBN 13 : 9786139587056

Neuf Taschenbuch

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Vendeur : buchversandmimpf2000, Emtmannsberg, BAYE, Allemagne

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Taschenbuch. Etat : Neu. This item is printed on demand - Print on Demand Titel. Neuware -This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work.VDM Verlag, Dudweiler Landstra�e 99, 66123 Saarbr�cken 52 pp. Englisch. N� de r�f. du vendeur 9786139587056

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ASIC Implementation of Low Power FP-AU using Reversible Logic : Floating Point (FP)-Arithmetic Units (AU)

Vijeyakumar Krishnasamy Natarajan

Edit� par LAP LAMBERT Academic Publishing, 2018

ISBN 10 : 6139587050 ISBN 13 : 9786139587056

Neuf Taschenbuch

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Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne

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Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - This book gives an insight into design of VLSI architectures for floating point arthimetic units using reversible logic for low power applications. Chapter 1 briefs the significance of reversible logic. Chapter 2 discusses various approaches in design of reversible arithmetic circuits. Chapter 3 describes the realization of basic gates in reversible logic. ASIC design of reversible floating point adder is discussed in chapter 4. In Chapter 5 ASIC design of reversible floating point multiplier is deliberated. Finally, chapter 6 concludes the work. N� de r�f. du vendeur 9786139587056

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ASIC Implementation of Low Power FP-AU using Reversible Logic | Floating Point (FP)-Arithmetic Units (AU)

Vijeyakumar Krishnasamy Natarajan (u. a.)

Edit� par LAP LAMBERT Academic Publishing, 2018

ISBN 10 : 6139587050 ISBN 13 : 9786139587056

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ASIC Implementation of Low Power FP-AU using Reversible Logic: Floating Point (FP)-Arithmetic Units (AU) - Couverture souple

Krishnasamy Natarajan, Vijeyakumar; Sundaram, Kalaiselvi; Bojan, Vinoth Kumar

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Krishnasamy Natarajan, Vijeyakumar ; Sundaram, Kalaiselvi ; Bojan, Vinoth Kumar