Low Power and Area Efficient 1024-Point FFT Processors: Using Power Radix with 4-Path Data Processing - Couverture souple

Vishnu Vardhan, Dupakuntla; Balaji, Kunati

 
9786200473400: Low Power and Area Efficient 1024-Point FFT Processors: Using Power Radix with 4-Path Data Processing
Couverture souple
ISBN 10 : 6200473404 ISBN 13 : 9786200473400
Editeur : LAP LAMBERT Academic Publishing, 2019

Synopsis

The Fast Fourier transform (FFT) algorithm with radix-2k is used to accomplish both a radix-2 butterfly and a minimize number with twiddle factor multiplication as Radix-2k delay feedback and radix-K delay commutators are the major well-known pipeline architecture for FFT design. To reduce the memory and area requirement here in this thesis we implemented a novel radix-24 multiple delay commutators called 4-Path Feedforward FFT architecture utilizes the advantage of the radix-2 algorithm. By Combining the advantages of Radix-2 algorithm and feed-forward architecture, the proposed 4-Path radix-24 FFT processor achieves the least hardware requirement of multipliers and power consumption also reduced more when compared with Dual-path Radix-22 delay feedback FFT architecture. The entire FFT algorithms were implemented in Verilog hardware description language and synthesized with Xilinx IЅΕ design suit.

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Éditeur
LAP LAMBERT Academic Publishing
Date d'édition
2019
Langue
anglais
ISBN 10 
6200473404
ISBN 13 
9786200473400
Reliure
Broché
Nombre de pages
68
Coordonnées du fabricant
non disponible
Personne responsable
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