Development of Efficient Hardware Architecture for Image Compression: The Mapping of the Computational Tasks Associated with the Discrete Wavelet Transform DWT - Couverture souple

Khalaf Hasan Al-jumaily, Khamees

 
9786202197526: Development of Efficient Hardware Architecture for Image Compression: The Mapping of the Computational Tasks Associated with the Discrete Wavelet Transform DWT
Couverture souple
ISBN 10 : 6202197528 ISBN 13 : 9786202197526
Editeur : LAP LAMBERT Academic Publishing, 2017

Synopsis

Focusing on the intensive computations involved in the discrete wavelet transform (DWT), the design of efficient hardware architectures for a fast computation of the transform has become imperative, especially for real-time applications. With this overall objective, the mapping of the computational tasks associated with the various resolution levels of the 5/3 DWT is first mathematically modeled, and then a modified computation of the DWT stages are explored from the standpoint of evading computing high frequency subbands. Furthermore, a Haar wavelet transform (HWT) is used for comparison. The proposed forward DWT (FDWT) and its inverse DWT (IDWT) hardware architecture filter generated similar results compared to the MATLAB model for the seven levels of DWT decomposition. Simulations were performed using grayscale images of different sizes to validate the proposed design and attain speed performance appropriate for a number of real-time applications.

Les informations fournies dans la section « Synopsis » peuvent faire référence à une autre édition de ce titre.

Présentation de l'éditeur

Focusing on the intensive computations involved in the discrete wavelet transform (DWT), the design of efficient hardware architectures for a fast computation of the transform has become imperative, especially for real-time applications. With this overall objective, the mapping of the computational tasks associated with the various resolution levels of the 5/3 DWT is first mathematically modeled, and then a modified computation of the DWT stages are explored from the standpoint of evading computing high frequency subbands. Furthermore, a Haar wavelet transform (HWT) is used for comparison. The proposed forward DWT (FDWT) and its inverse DWT (IDWT) hardware architecture filter generated similar results compared to the MATLAB model for the seven levels of DWT decomposition. Simulations were performed using grayscale images of different sizes to validate the proposed design and attain speed performance appropriate for a number of real-time applications.

Biographie de l'auteur

Khamees Khalaf Hasan Al-jumaily, received the Bachelor’s B.Sc. and Master M.Sc. degrees in Electrical Engineering and in Communication Engineering from University Of Technology in Baghdad, Iraq in 1985 and 2005, respectively. He completed his Ph.D. degree in image coding for FPGA applications, in June 2015 from Universiti Sains Malaysia USM.

Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.

Éditeur
LAP LAMBERT Academic Publishing
Date d'édition
2017
Langue
anglais
ISBN 10 
6202197528
ISBN 13 
9786202197526
Reliure
Broché
Nombre de pages
268
Coordonnées du fabricant
non disponible
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