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Description du livre Soft Cover. Etat : new. N° de réf. du vendeur 9789048179169
Description du livre Etat : New. N° de réf. du vendeur ABLIING23Apr0316110339029
Description du livre Etat : New. PRINT ON DEMAND Book; New; Fast Shipping from the UK. No. book. N° de réf. du vendeur ria9789048179169_lsuk
Description du livre PF. Etat : New. N° de réf. du vendeur 6666-IUK-9789048179169
Description du livre Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The ever increasing complexity of modern electronic devices together with the continually shrinking time-to-market and product lifetimes pose enormous chip design challenges to meet flexibility, performance and energy efficiency constraints. As a consequence, the current trend is towards programmable platforms (Multi-Processor System-on-Chip Platforms, MP-SoC), which are tailored to the respective target application. In the usual case, a new platform is designed by selecting and assembling standard platform elements.However, best results can only be achieved if the processor cores and the communication modules themselves are also optimized for the target application. Effective exploration is only possible if accurate module simulators are generated automatically based on abstract specifications. As a matter of fact, CoWare's BusCompiler allows generating accurate simulators for communication modules, and modeling languages such as LISA enable the same for processor cores.In Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms, such originally independent approaches are combined in order to enable the development of highly optimized programmable platforms.The first chapters of this book summarize the state of the art in all three involved fields separately: general system level design, communication modeling, and processor modeling. The main chapters then present a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation. 176 pp. Englisch. N° de réf. du vendeur 9789048179169
Description du livre Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. New methodology with potential for obtaining best results in MP-SoC designMost detailed book about retargetable processor system integrationSeparate, elaborated introduction into state of the art for all 3 involved fieldsBoth Prof. . N° de réf. du vendeur 5821751
Description du livre Taschenbuch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - The ever increasing complexity of modern electronic devices together with the continually shrinking time-to-market and product lifetimes pose enormous chip design challenges to meet flexibility, performance and energy efficiency constraints. As a consequence, the current trend is towards programmable platforms (Multi-Processor System-on-Chip Platforms, MP-SoC), which are tailored to the respective target application. In the usual case, a new platform is designed by selecting and assembling standard platform elements.However, best results can only be achieved if the processor cores and the communication modules themselves are also optimized for the target application. Effective exploration is only possible if accurate module simulators are generated automatically based on abstract specifications. As a matter of fact, CoWare's BusCompiler allows generating accurate simulators for communication modules, and modeling languages such as LISA enable the same for processor cores.In Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms, such originally independent approaches are combined in order to enable the development of highly optimized programmable platforms.The first chapters of this book summarize the state of the art in all three involved fields separately: general system level design, communication modeling, and processor modeling. The main chapters then present a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation. N° de réf. du vendeur 9789048179169