C Compilers for ASIPs
Hohenauer, Manuel; Leupers, Rainer
ISBN 10: 1441911758 ISBN 13: 9781441911759
Edité par Springer-Verlag New York Inc., 2009
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Couverture rigide
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A propos de cet article
Description :
This book presents a novel approach for Architecture Description Language (ADL)-based instruction-set description that enables the automatic retargeting of the complete software toolkit from a single ADL processor model. Num Pages: 223 pages, 9 black & white tables, biography. BIC Classification: TJFC. Category: (P) Professional & Vocational. Dimension: 234 x 156 x 14. Weight in Grams: 1140. . 2009. Hardback. . . . . Books ship from the US and Ireland. N° de réf. du vendeur V9781441911759
Synopsis :
ASIP Design Methodology.- A Short Introduction to Compilers.- Related Work.- Processor Designer.- Code Selector Description Generation.- Results for Semantics based Compiler Generation.- SIMD Optimization.- Predicated Execution.- Assembler Optimizer.- Summary.
Présentation de l'éditeur:
This book presents a novel approach for Architecture Description Language (ADL)-based instruction-set description that enables the automatic retargeting of the complete software toolkit from a single ADL processor model.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
Détails bibliographiques
Titre : C Compilers for ASIPs
Éditeur : Springer-Verlag New York Inc.
Date d'édition : 2009
Reliure : Couverture rigide
Etat : New
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ISBN 10 : 1441911758
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C Compilers for ASIPs: Automatic Compiler Generation with LISA
Edité par
SPRINGER NATURE Okt 2009, 2009
ISBN 10 : 1441911758
ISBN 13 : 9781441911759
Neuf
Couverture rigide
Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
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Buch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -C Compilers for ASIPs: Automatic Compiler Generation with LISA by: Manuel HohenauerRainer LeupersThe ever increasing complexity and performance requirements of modern electronic devices are changing the way embedded systems are designed and implemented today. The current trend is towards programmable System-on-Chip platforms which employ an increasing number of Application Specific Instruction-set Processors (ASIPs) as building blocks. ASIP design platforms comprise retargetable software development tools that can be adapted quickly to varying target processor configurations. Such tools are usually driven by a processor model given in an Architecture Description Language (ADL), such as LISA. One of the major challenges in this context is retargetable compilation for high-level programming languages like C. First of all, an ADL must capture the architectural information needed for the tool generation in an unambiguous and consistent way. This is particularly difficult for compiler and instruction-set simulator. Moreover, there exists a trade-off between the compiler's flexibility and the quality of compiled code. This book presents a novel approach for ADL-based instruction-set description in order to enable the automatic retargeting of the complete software toolkit from a single ADL processor model. Additionally, this book includes retargetable optimization techniques for architectures with SIMD and Predicated Execution support. Both allows a high speedup in compiler generation and combines high flexibility with acceptable code quality at the same time. Coverage includes a comprehensive overview of retargetable compilers and ADL based processor design, a methodology and related toolkit to generate a C-compiler fully automatically from an ADL processor model, and retargetable code optimization techniques. Presents a strong background and various perspectives of architecture description language (ADL)-based processor design and the retargetable compilation problem;Provides the history of ADL based processor design, making the reader knowledgeable about the past research as well as the difficulties faced over time;Offers an ADL based modelling formalism and corresponding implementation methods, which can be used for automatic compiler retargeting to quickly obtain compiler support for newly developed ASIPs;Presents retargetable optimization techniques for common ASIP features, which can be quickly adapted to varying target processor configurations and help to meet the stringent performance requirements of embedded applications. 223 pp. Englisch. N° de réf. du vendeur 9781441911759
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C Compilers for ASIPs : Automatic Compiler Generation with LISA
Edité par
Springer New York, 2009
ISBN 10 : 1441911758
ISBN 13 : 9781441911759
Neuf
Couverture rigide
Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
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Buch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - C Compilers for ASIPs: Automatic Compiler Generation with LISA by: Manuel HohenauerRainer LeupersThe ever increasing complexity and performance requirements of modern electronic devices are changing the way embedded systems are designed and implemented today. The current trend is towards programmable System-on-Chip platforms which employ an increasing number of Application Specific Instruction-set Processors (ASIPs) as building blocks. ASIP design platforms comprise retargetable software development tools that can be adapted quickly to varying target processor configurations. Such tools are usually driven by a processor model given in an Architecture Description Language (ADL), such as LISA. One of the major challenges in this context is retargetable compilation for high-level programming languages like C. First of all, an ADL must capture the architectural information needed for the tool generation in an unambiguous and consistent way. This is particularly difficult for compiler and instruction-set simulator. Moreover, there exists a trade-off between the compiler's flexibility and the quality of compiled code. This book presents a novel approach for ADL-based instruction-set description in order to enable the automatic retargeting of the complete software toolkit from a single ADL processor model. Additionally, this book includes retargetable optimization techniques for architectures with SIMD and Predicated Execution support. Both allows a high speedup in compiler generation and combines high flexibility with acceptable code quality at the same time. Coverage includes a comprehensive overview of retargetable compilers and ADL based processor design, a methodology and related toolkit to generate a C-compiler fully automatically from an ADL processor model, and retargetable code optimization techniques. Presents a strong background and various perspectives of architecture description language (ADL)-based processor design and the retargetable compilation problem;Provides the history of ADL based processor design, making the reader knowledgeable about the past research as well as the difficulties faced over time;Offers an ADL based modelling formalism and corresponding implementation methods, which can be used for automatic compiler retargeting to quickly obtain compiler support for newly developed ASIPs;Presents retargetable optimization techniques for common ASIP features, which can be quickly adapted to varying target processor configurations and help to meet the stringent performance requirements of embedded applications. N° de réf. du vendeur 9781441911759
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C Compilers for ASIPs
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C Compilers for ASIPs (Hardcover)
Edité par
Springer-Verlag New York Inc., New York, NY, 2009
ISBN 10 : 1441911758
ISBN 13 : 9781441911759
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Couverture rigide
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Hardcover. Etat : new. Hardcover. 1. 1 Motivation Digital information technology has revolutionized the world during the last few decades. Todayabout98%ofprogrammabledigitaldevicesareactuallyembedded [132]. Theseembeddedsystemshavebecomethemainapplicationareaofinfor- tiontechnologyhardwareandarethebasistodeliverthesophisticatedfunctionality of today's technical devices. As shown in Fig. 1. 1(a), current forecasts predict a worldwideembeddedsystemmarketof$88billionin2009. Millions of Gates 40 25% 300 2004 35 Available Gates 2009 250 20% Used Gates AAGR% 30 200 Design Productivity Gap 25 15% Design Productivity Gap 20 150 10% 15 100 10 5% 50 32 55 25 50 5 20 47 43 10 8 123 0,8 0 0 0% 1993 1995 1997 1999 2001 2003 2005 America Europe Japan Asia-Pacific (a) Global embedded systems revenue and (b) Crisis of complexity [217] average annual growth rate(AAGR) [103] Fig. 1. 1 Embeddedsystemdesign Overthepastfewyears,theever-increasingcomplexityandperformancerequi- mentsofnewwirelesscommunications,automotiveandconsumerelectronicsapp- cations are changing the way embedded systems are designed and implemented today. InconformitywithMoore'slaw[99],onedrivingforceistherapidprogress in deep-submicron process technologies.Chip designers and manufacturers have constantly pushed the envelope of technological and physical constraints. In fact, designers have more gates at their disposal than ever before. However, current M. Hohenauer,R. Leupers, C Compilers for ASIPs, 1 DOI10. 1007/978-1-4419-1176-6 1, C SpringerScience+BusinessMedia,LLC2010 $Billions 2 1 Introduction mainstream-embeddedsystemdesignsarenotusingatleast50%ofthesiliconar ea availabletothem(Fig. 1. 1(b)). Thegrowthindesigncomplexitythreatenstooutpace thedesigner'sproductivity,onaccountofunmanageabledesignsizesandtheneed formoredesigniterationsduetodeep-submicroneffects. Thisphenomenonisalso referredtoas crisis of complexity[103]andcomesalongwithexponentiallygr- ing non-recurring engineering (NRE) costs (Fig. 1. 2) to design and manufacture chips. Understandably,thesecostsonlyamortizeforverylargevolumesorhigh-end products. $100. 000. 000. 000,00 $10. 000. 000. 000,00 $1. 000. 000. 000,00 $100. 000. 000,00 RTL Methodology Future Improvements $10. 000. 000,00 1990 1995 2000 2005 2010 2015 Fig. 1. This book presents a novel approach for Architecture Description Language (ADL)-based instruction-set description that enables the automatic retargeting of the complete software toolkit from a single ADL processor model. Shipping may be from multiple locations in the US or from the UK, depending on stock availability. N° de réf. du vendeur 9781441911759
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