C Compilers for ASIPs

Manuel Hohenauer, Rainer Leupers

ISBN 10: 1441911758 / ISBN 13: 9781441911759

Edité par Springer-Verlag New York Inc., US, 2009

A propos de cet article

1. 1 Motivation Digital information technology has revolutionized the world during the last few decades. Todayabout98%ofprogrammabledigitaldevicesareactuallyembedded [132]. Theseembeddedsystemshavebecomethemainapplicationareaofinfor- tiontechnologyhardwareandarethebasistodeliverthesophisticatedfunctionality of today's technical devices. As shown in Fig. 1. 1(a), current forecasts predict a worldwideembeddedsystemmarketof$88billionin2009. Millions of Gates 40 25% 300 2004 35 Available Gates 2009 250 20% Used Gates AAGR% 30 200 Design Productivity Gap 25 15% Design Productivity Gap 20 150 10% 15 100 10 5% 50 32 55 25 50 5 20 47 43 10 8 123 0,8 0 0 0% 1993 1995 1997 1999 2001 2003 2005 America Europe Japan Asia-Pacific (a) Global embedded systems revenue and (b) Crisis of complexity [217] average annual growth rate(AAGR) [103] Fig. 1. 1 Embeddedsystemdesign Overthepastfewyears,theever-increasingcomplexityandperformancerequi- mentsofnewwirelesscommunications,automotiveandconsumerelectronicsapp- cations are changing the way embedded systems are designed and implemented today. InconformitywithMoore'slaw[99],onedrivingforceistherapidprogress in deep-submicron process technologies.Chip designers and manufacturers have constantly pushed the envelope of technological and physical constraints. In fact, designers have more gates at their disposal than ever before. However, current M. Hohenauer,R. Leupers, C Compilers for ASIPs, 1 DOI10. 1007/978-1-4419-1176-6 1, C SpringerScience+BusinessMedia,LLC2010 $Billions 2 1 Introduction mainstream-embeddedsystemdesignsarenotusingatleast50%ofthesiliconarea availabletothem(Fig. 1. 1(b)). Thegrowthindesigncomplexitythreatenstooutpace thedesigner'sproductivity,onaccountofunmanageabledesignsizesandtheneed formoredesigniterationsduetodeep-submicroneffects. Thisphenomenonisalso referredtoas crisis of complexity[103]andcomesalongwithexponentiallygr- ing non-recurring engineering (NRE) costs (Fig. 1. 2) to design and manufacture chips. Understandably,thesecostsonlyamortizeforverylargevolumesorhigh-end products. $100. 000. 000. 000,00 $10. 000. 000. 000,00 $1. 000. 000. 000,00 $100. 000. 000,00 RTL Methodology Future Improvements $10. 000. 000,00 1990 1995 2000 2005 2010 2015 Fig. 1.

N° de réf. du vendeur LU-9781441911759

Détails bibliographiques

• Titre: C Compilers for ASIPs
• Éditeur: Springer-Verlag New York Inc., US
• Date de parution: 2009
• Langue: anglais
• ISBN à 10 chiffres: 1441911758
• ISBN à 13 chiffres: 9781441911759
• Reliure: Hardback
• Édition: 2010 ed.
• État de l'article: New

A propos de ce titre

Synopsis

ASIP Design Methodology.- A Short Introduction to Compilers.- Related Work.- Processor Designer.- Code Selector Description Generation.- Results for Semantics based Compiler Generation.- SIMD Optimization.- Predicated Execution.- Assembler Optimizer.- Summary.

Présentation de l'éditeur

This book presents a novel approach for Architecture Description Language (ADL)-based instruction-set description that enables the automatic retargeting of the complete software toolkit from a single ADL processor model.