Developing Digital RF Memories and Tranceiver Technologies for Electronic Warfare

Phillip E Pace

ISBN 10: 1630816973 / ISBN 13: 9781630816971

Edité par Artech House Publishers Apr 2024, 2024

A propos de cet article

Neuware - 'This book provides a comprehensive resource and thorough treatment of the latest development of digital RF memory (DRFM) technology and its key role in maintaining dominance over the electromagnetic spectrum.'--Page 4 of cover.

N° de réf. du vendeur 9781630816971

Détails bibliographiques

• Titre: Developing Digital RF Memories and Tranceiver Technologies for Electronic Warfare
• Éditeur: Artech House Publishers Apr 2024
• Date de parution: 2024
• Langue: anglais
• ISBN à 10 chiffres: 1630816973
• ISBN à 13 chiffres: 9781630816971
• Reliure: Buch
• État de l'article: Neu

A propos de ce titre

Synopsis

This exciting new resources provides the latest in design concepts and the current state of technology in digital radio frequency memories (DRFM), focusing on the techniques used in electronic warfare. The design of amplitude sampling and phase sampling DRFM are explored, and their trade-offs evaluated. The book helps readers understand the many applications that can benefit from the use of a DRFM and how to develop models for different DRFM configurations. It explores the design trade-offs in developing multiple, structured, false target synthesis DRFM architectures and aids in developing counter-DRFM techniques and distinguish false target from real ones. Written by an expert in the field, and including MATLAB design software, this is the only comprehensive book written on the subject of DRFM. Architectures, Design Techniques and Tradeoffs; Circuit Design Concepts and Mathematical Models; DRFMS in Electronic Attack; Processor Augmentation for Superior RF Decoys; Electronic Protection Methods Against DRFM False Targets; Integrated Photonic DRFM Techniques; Superconductor Electronics.

À propos de l?auteur

Pace Phillip E. Pace is a professor in the Department of Electrical and Computer Engineering at the Naval Postgraduate School in Monterey, California, where he serves as Chairman of the N433 Threat Simulator Validation Working Group and Director of the NPS Center for Joint Services Electronic Warfare. He is also the author of Advanced Techniques for Digital Receivers (Artech House, 2000) and he has published numerous papers on topics involving high speed signal processing in electronics and warfare applications. Dr. Pace received his Ph.D. from the University of Cincinnati.