System–on–a–chip (SoC) has become an essential technique to lowerproduct costs and maximize power efficiency, particularly as themobility and size requirements of electronics continues to grow. Ithas therefore become increasingly important for electricalengineers to develop a strong understanding of the key stages ofhardware description language (HDL) design flow based on cell–basedlibraries or field–programmable gate array (FPGA) devices. Honedand revised through years of classroom use, Lin focuses ondeveloping, verifying, and synthesizing designs of practicaldigital systems using the most widely used hardware descriptionLanguage: Verilog HDL.
- Explains how to perform synthesis and verification to achieveoptimized synthesis results and compiler times
- Offers complete coverage of Verilog syntax
- Illustrates the entire design and verification flow using anFPGA case study
- Presents real–world design examples such as LED and LCDdisplays, GPIO, UART, timers, and CPUs
- Emphasizes design/implementation tradeoff options, withcoverage of ASICs and FPGAs
- Provides an introduction to design for testability
- Gives readers deeper understanding by using problems and reviewquestions in each chapter
- Comes with downloadable Verilog HDL source code for mostexamples in the text
- Includes presentation slides of all book figures for studentreference
Digital System Designs and Practices Using Verilog HDL andFPGAs is an ideal textbook for either fundamental or advanceddigital design courses beyond the digital logic design level.Design engineers who want to become more proficient users ofVerilog HDL as well as design FPGAs with greater speed and accuracywill find this book indispensable.