High-Performance Computing on the Intel® Xeon Phi¿ : How to Fully Exploit MIC Architectures

Endong Wang

ISBN 10: 3319064851 / ISBN 13: 9783319064857

Edité par Springer International Publishing, 2014

A propos de cet article

Druck auf Anfrage Neuware - Printed after ordering - The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel® Xeon Phi(TM) series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors' first-hand optimization experience.The material is organized in three sections. The first section, 'Basics of MIC', introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on 'Performance Optimization' explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, 'Project development' presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.This book appeals to two main audiences: First, software developers for HPC applications - it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing - it will guide them on how to push the limits of system performance for HPC applications. N° de réf. du vendeur 9783319064857

Détails bibliographiques

Titre : High-Performance Computing on the Intel® ...

Éditeur : Springer International Publishing

Date d'édition : 2014

Reliure : Buch

Etat : Neu

A propos de ce titre

Synopsis :

The aim of this book is to explain to high-performance computing (HPC) developers how to utilize the Intel(R) Xeon Phi(TM) series products efficiently. To that end, it introduces some computing grammar, programming technology and optimization methods for using many-integrated-core (MIC) platforms and also offers tips and tricks for actual use, based on the authors' first-hand optimization experience. The material is organized in three sections. The first section, "Basics of MIC", introduces the fundamentals of MIC architecture and programming, including the specific Intel MIC programming environment. Next, the section on "Performance Optimization" explains general MIC optimization techniques, which are then illustrated step-by-step using the classical parallel programming example of matrix multiplication. Finally, "Project development" presents a set of practical and experience-driven methods for using parallel computing in application projects, including how to determine if a serial or parallel CPU program is suitable for MIC and how to transplant a program onto MIC.This book appeals to two main audiences: First, software developers for HPC applications - it will enable them to fully exploit the MIC architecture and thus achieve the extreme performance usually required in biological genetics, medical imaging, aerospace, meteorology and other areas of HPC. Second, students and researchers engaged in parallel and high-performance computing - it will guide them on how to push the limits of system performance for HPC applications.