SOC test design and its optimization is the topic of Introduction to Advanced System-on-Chip Test Design and Optimization. It gives an introduction to testing, describes the problems related to SOC testing, discusses the modeling granularity and the implementation into EDA (electronic design automation) tools. The book is divided into three sections: i) test concepts, ii) SOC design for test, and iii) SOC test applications. The first part covers an introduction into test problems including faults, fault types, design-flow, design-for-test techniques such as scan-testing and Boundary Scan. The second part of the book discusses SOC related problems such as system modeling, test conflicts, power consumption, test access mechanism design, test scheduling and defect-oriented scheduling. Finally, the third part focuses on SOC applications, such as integrated test scheduling and TAM design, defect-oriented scheduling, and integrating test design with the core selection process.

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Dr. Erik Larsson is an assistant professor at Link�pings University in Sweden, and he is an active member of the IEEE Testing and Circuits & Systems societies

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Articles li�s � Introduction to Advanced System-on-Chip Test Design...

Introduction to Advanced System-on-Chip Test Design and Optimization (Frontiers in Electronic Testing, 29)

Larsson, Erik

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