Logic Minimization Algorithms for VLSI Synthesis: 2 (The Springer International Series in Engineering and Computer Science, 2)

Brayton, Robert K. Robert K. Brayton, Gary D. Hachtel, C. McMullen, Alberto L. Sangiovanni-Vincentelli,

ISBN 10: 0898381649 / ISBN 13: 9780898381641

Edité par Springer, 1984

A propos de cet article

Logic Minimization Algorithms for VLSI Synthesis: 2 (The Springer International Series in Engineering and Computer Science, 2) This book is in very good condition and will be shipped within 24 hours of ordering. The cover may have some limited signs of wear but the pages are clean, intact and the spine remains undamaged. This book has clearly been well maintained and looked after thus far. Money back guarantee if you are not satisfied. See all our books here, order more than 1 book and get discounted shipping. .

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Détails bibliographiques

• Titre: Logic Minimization Algorithms for VLSI Synthesis: 2 (The Springer International Series in Engineering and Computer Science, 2)
• Éditeur: Springer
• Date de parution: 1984
• Langue: anglais
• ISBN à 10 chiffres: 0898381649
• ISBN à 13 chiffres: 9780898381641
• Reliure: hardcover
• État de l'article: Very Good

A propos de ce titre

Synopsis

The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects, the impor- tance of logic minimization for the synthesis of area and performance effective circuits clearly emerged. In 1980, Richard Newton stirred our interest by pointing out new heuristic algorithms for two-level logic minimization and the potential for improving upon existing approaches. In the summer of 1981, the authors organized and participated in a seminar on logic manipulation at IBM Research. One of the goals of the seminar was to study the literature on logic minimization and to look at heuristic algorithms from a fundamental and comparative point of view. The fruits of this investigation were surprisingly abundant: it was apparent from an initial implementation of recursive logic minimiza- tion (ESPRESSO-I) that, if we merged our new results into a two-level minimization program, an important step forward in automatic logic synthesis could result. ESPRESSO-II was born and an APL implemen- tation was created in the summer of 1982. The results of preliminary tests on a fairly large set of industrial examples were good enough to justify the publication of our algorithms. It is hoped that the strength and speed of our minimizer warrant its Italian name, which denotes both express delivery and a specially-brewed black coffee.