Since register transfer level (RTL) design is less about being a bright engineer, and more about knowing the downstream implications of your work, this book explains the impact of design decisions taken that may give rise later in the product lifecycle to issues related to testability, data synchronization across clock domains, synthesizability, power consumption, routability, etc., all which are a function of the way the RTL was originally written. Readers will benefit from a highly practical approach to the fundamentals of these topics, and will be given clear guidance regarding necessary safeguards to observe during RTL design.

Les informations fournies dans la section � A propos du livre � peuvent faire r�f�rence � une autre �dition de ce titre.

Description de la librairie

Librer�a on-line de libros usados

Visitez la page d�accueil du vendeur

Informations commerciales relatives au vendeur

OASIS MEDIA BOOKS SC
CALLE TUCUMAN, NUM. 7 PLANTA 7, PUERTA C, Sevilla, 41006, Spain

Conditions de vente et de livraison

Conditions g�n�rales de vente

Librer�a on-line de libros usados

Conditions d'exp�dition

Los gastos de env�o se calculan para env�os est�ndar.

Orders usually ship within 2 business days. Shipping costs are based on books weighing 2.2 LB, or 1 KG. If your book order is heavy or oversized, we may contact you to let you know extra shipping is required.