Synopsis
Introduction.- QCA Background.- Fundamental of Reversible Logic.- Design of Reversible Gates in QCA.- Designs of Adder Circuit in QCA.- Array Dividers in QCA.- Design of Arithmetic Logic Unit in QCA.- Design of Registers and Memory in QCA.- Clocking Schemes for QCA.- Conclusion and Possible Future Direction.
À propos de l?auteur
Dr. Trailokya Nath Sasamal is currently working as Assistant Professor in the Department of Electronics & Communication Engineering at National Institute of Technology, Kurukshetra, India since August 2013. He has more than 7 years research and teaching experience in various University systems of the India. Dr. Sasamal has obtained Ph.D. degree from the Department of Electronics & Communication Engineering, NIT Kurukshetra, Haryana. He obtained his M. Tech degree in Electronics Engineering from Indian Institute of Technology, Banaras Hindu University, Varanasi, India. He obtained his B. Tech degree in Electronics & Telecommunication from the KEC, Bhubaneswar, India, in 2007. He has presented and published over 40 research papers in reputed journals and various national and international conferences. His research interests include Quantum-dot Cellular Automata, Reversible logic, and new architectures for emerging nano-devices. He is also involved in reviewing process in differentjournals and conferences such as; IET, JCSC, IETE, DSJ etc.
Dr. Ashutosh Kumar Singh is working as a Professor and Head; Department of Computer Applications; National Institute of Technology; Kurukshetra, India. He has more than 15 years research and teaching experience. Dr Singh has obtained Ph. D. degree in Electronics Engineering from Indian Institute of Technology, BHU, India, Post Doc from Department of Computer Science, University of Bristol, UK and Charted Engineer from UK. His research area includes Verification, Synthesis, Design and Testing of Digital Circuits. He has published more than 150 research papers till now in peer reviewed journals, conferences and news magazines and in these areas. He is the co-author of six books which includes "Web Spam Detection Application using Neural Network", "Digital Systems Fundamentals" and "Computer System Organization & Architecture". He is also an Editorial Board Member of several international journals. He is also involved in reviewing process in different journals and conferences such as; IEEE transaction of computer, IET, IEEE conference on ITC, ADCOM etc.
Prof. Anand Mohan, former Director of National Institute of Technology (NIT), Kurukshetra, Haryana has 41 years of rich experience in teaching, research, industrial R & D. He is currently working as Professor (HAG) in the Department of Electronics Engineering, IIT(BHU), Varanasi. He has made notable research contributions in the areas of robust watermarking, telemedicine, and fault tolerant digital system design. Eleven students have been awarded Ph.D. degree under his supervision. He has published 145 research papers in reputed international / national journals and conference proceedings and made two chapter contributions in books. Prof. Mohan obtained UG, PG and Ph. D. degrees in Electronics Engineering from Banaras Hindu University. He is recipient of 'Life Time Achievement Award' conferred by Kamla Nehru Institute of Technology (KNIT), Sultanpur (2016). His co-authored research papers have merited Best Postgraduate Research Paper Award of Bintulu Development Authority, Malaysia (2012), awards of International Union of Radio Science, Belgium (2005), Institution of Engineers, India (2003), and Indian Science Congress (1999). Prof. Mohan is Fellow of Institution of Electronics and Telecommunication Engineers (IETE), Fellow of Institution of Engineers (I), Member, IEEE, USA life member of Project Management Associates (PMA), New Delhi, and Life member of Indian Society of Technical Education (ISTE), New Delhi.
Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.
