Software Synthesis from Dataflow Graphs

Bhattacharyya, Shuvra S.; Murthy, Praveen K.; Lee, Edward A.

ISBN 10: 0792397223 ISBN 13: 9780792397229

Edit� par Kluwer Academic Publishers, 1996

Neuf(s) Couverture rigide

Vendeur Kennys Bookshop and Art Galleries Ltd., Galway, GY, Irlande �valuation du vendeur 5 sur 5 �toiles

Vendeur AbeBooks depuis 27 f�vrier 2001

Cet article sp�cifique n'est plus disponible.

Afficher tous les articles du vendeur Cr�er une demande de livres portant sur des articles similaires

Afficher tous les exemplaires de ce livre

A propos de cet article

This text addresses the problem of generating efficient software implementations from applications specified as synchronous dataflow graphs for programmable digital signal processors (DSPs) used in embedded real-time systems. Series: The Springer International Series in Engineering and Computer Science. Num Pages: 190 pages, biography. BIC Classification: PHDS; TJK. Category: (P) Professional & Vocational. Dimension: 234 x 156 x 12. Weight in Grams: 470. . 1996. Hardback. . . . . N� de r�f. du vendeur V9780792397229

Signaler cet article

Synopsis :

Software Synthesis from Dataflow Graphs addresses the problem of generating efficient software implementations from applications specified as synchronous dataflow graphs for programmable digital signal processors (DSPs) used in embedded real- time systems. The advent of high-speed graphics workstations has made feasible the use of graphical block diagram programming environments by designers of signal processing systems. A particular subset of dataflow, called Synchronous Dataflow (SDF), has proven efficient for representing a wide class of unirate and multirate signal processing algorithms, and has been used as the basis for numerous DSP block diagram-based programming environments such as the Signal Processing Workstation from Cadence Design Systems, Inc., COSSAP from Synopsys^(R) (both commercial tools), and the Ptolemy environment from the University of California at Berkeley.
A key property of the SDF model is that static schedules can be determined at compile time. This removes the overhead of dynamic scheduling and is thus useful for real-time DSP programs where throughput requirements are often severe. Another constraint that programmable DSPs for embedded systems have is the limited amount of on-chip memory. Off-chip memory is not only expensive but is also slower and increases the power consumption of the system; hence, it is imperative that programs fit in the on-chip memory whenever possible.
Software Synthesis from Dataflow Graphs reviews the state-of-the-art in constructing static, memory-optimal schedules for programs expressed as SDF graphs. Code size reduction is obtained by the careful organization of loops in the target code. Data buffering is optimized by constructing the loop hierarchy in provably optimal ways for many classes of SDF graphs. The central result is a uniprocessor scheduling framework that provably synthesizes the most compact looping structures, called singleappearance schedules, for a certain class of SDF graphs. In addition, algorithms and heuristics are presented that generate single appearance schedules optimized for data buffering usage. Numerous practical examples and extensive experimental data are provided to illustrate the efficacy of these techniques.

Les informations fournies dans la section � A propos du livre � peuvent faire r�f�rence � une autre �dition de ce titre.

D�tails bibliographiques

Titre : Software Synthesis from Dataflow Graphs
�diteur : Kluwer Academic Publishers
Date d'�dition : 1996
Reliure : Couverture rigide
Etat : New

Meilleurs r�sultats de recherche sur AbeBooks

Image d'archives

The Kluwer International Series in Engineering and Computer Science: Software Synthesis from Dataflow Graphs

Bhattacharyya, Shuvra S.

Edit� par Kluwer Academic, 1996

ISBN 10 : 0792397223 ISBN 13 : 9780792397229

Ancien ou d'occasion Couverture rigide

Vendeur : Anybook.com, Lincoln, Royaume-Uni

�valuation du vendeur 5 sur 5 �toiles

Etat : Good. This is an ex-library book and may have the usual library/used-book markings inside.This book has hardback covers. In good all round condition. No dust jacket. Please note the Image in this listing is a stock photo and may not match the covers of the actual item,600grams, ISBN:9780792397229. N� de r�f. du vendeur 5762373

Contacter le vendeur

Acheter D'occasion

EUR 57,52

Exp�dition �EUR 15,71
Exp�dition depuis Royaume-Uni vers Etats-Unis

Quantit� disponible : 1 disponible(s)

Ajouter au panier

Image d'archives

Software Synthesis from Dataflow Graphs

Shuvra S. Bhattacharyya, Edward A. Lee, Praveen K. Murthy

Edit� par Springer US, 1996

ISBN 10 : 0792397223 ISBN 13 : 9780792397229

Ancien ou d'occasion Couverture rigide

Vendeur : Buchpark, Trebbin, Allemagne

�valuation du vendeur 5 sur 5 �toiles

Etat : Sehr gut. Zustand: Sehr gut | Sprache: Englisch | Produktart: B�cher | Software Synthesis from Dataflow Graphs addresses the problem of generating efficient software implementations from applications specified as synchronous dataflow graphs for programmable digital signal processors (DSPs) used in embedded real- time systems. The advent of high-speed graphics workstations has made feasible the use of graphical block diagram programming environments by designers of signal processing systems. A particular subset of dataflow, called Synchronous Dataflow (SDF), has proven efficient for representing a wide class of unirate and multirate signal processing algorithms, and has been used as the basis for numerous DSP block diagram-based programming environments such as the Signal Processing Workstation from Cadence Design Systems, Inc., COSSAP from Synopsys� (both commercial tools), and the Ptolemy environment from the University of California at Berkeley. A key property of the SDF model is that static schedules can be determined at compile time. This removes the overhead of dynamic scheduling and is thus useful for real-time DSP programs where throughput requirements are often severe. Another constraint that programmable DSPs for embedded systems have is the limited amount of on-chip memory. Off-chip memory is not only expensive but is also slower and increases the power consumption of the system; hence, it is imperative that programs fit in the on-chip memory whenever possible. Software Synthesis from Dataflow Graphs reviews the state-of-the-art in constructing static, memory-optimal schedules for programs expressed as SDF graphs. Code size reduction is obtained by the careful organization of loops in the target code. Data buffering is optimized by constructing the loop hierarchy in provably optimal ways for many classes of SDF graphs. The central result is a uniprocessor scheduling framework that provably synthesizes the most compact looping structures, called singleappearance schedules, for a certain class of SDF graphs. In addition, algorithms and heuristics are presented that generate single appearance schedules optimized for data buffering usage. Numerous practical examples and extensive experimental data are provided to illustrate the efficacy of these techniques. N� de r�f. du vendeur 1658203/202

Contacter le vendeur

Acheter D'occasion

EUR 61,18

Exp�dition �EUR 105
Exp�dition depuis Allemagne vers Etats-Unis

Quantit� disponible : 2 disponible(s)

Ajouter au panier

Image fournie par le vendeur

Software Synthesis from Dataflow Graphs

Shuvra S. Bhattacharyya|Praveen K. Murthy|Edward A. Lee

Edit� par Springer US, 1996

ISBN 10 : 0792397223 ISBN 13 : 9780792397229

Neuf Couverture rigide

impression � la demande

Vendeur : moluna, Greven, Allemagne

�valuation du vendeur 4 sur 5 �toiles

Gebunden. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Software Synthesis from Dataflow Graphs addresses the problem of generating efficient software implementations from applications specified as synchronous dataflow graphs for programmable digital signal processors (DSPs) used in embedded real- ti. N� de r�f. du vendeur 5971686

Contacter le vendeur

Acheter neuf

EUR 92,27

Exp�dition �EUR 48,99
Exp�dition depuis Allemagne vers Etats-Unis

Quantit� disponible : Plus de 20 disponibles

Ajouter au panier

Image fournie par le vendeur

Autres images

Software Synthesis from Dataflow Graphs

Shuvra S. Bhattacharyya (u. a.)

Edit� par Springer, 1996

ISBN 10 : 0792397223 ISBN 13 : 9780792397229

Neuf Couverture rigide

impression � la demande

Vendeur : preigu, Osnabr�ck, Allemagne

�valuation du vendeur 5 sur 5 �toiles

Contacter le vendeur

Acheter neuf

EUR 95,70

Exp�dition �EUR 70
Exp�dition depuis Allemagne vers Etats-Unis

Quantit� disponible : 5 disponible(s)

Ajouter au panier

Image fournie par le vendeur

Software Synthesis from Dataflow Graphs

Shuvra S. Bhattacharyya

Edit� par Springer, Springer Mai 1996, 1996

ISBN 10 : 0792397223 ISBN 13 : 9780792397229

Neuf Couverture rigide

impression � la demande

Vendeur : buchversandmimpf2000, Emtmannsberg, BAYE, Allemagne

�valuation du vendeur 5 sur 5 �toiles

Buch. Etat : Neu. This item is printed on demand - Print on Demand Titel. Neuware -1 Introduction.- 1.1 Block Diagram Environments.- 1.2 Modularity and Code Generation.- 1.3 Dataflow.- 1.4 Synchronous Dataflow.- 1.5 Generalizations to the SDF model.- 1.6 Compilation Model.- 1.7 Constructing Efficient Periodic Schedules.- 1.8 Related Work.- 2 Terminology and Notation.- 2.1 Graph Concepts.- 2.2 Computational Complexity.- 3 Synchronous dataflow.- 3.1 Computing the Repetitions Vector.- 3.2 Constructing a Valid Schedule.- 3.3 Scheduling to Minimize Buffer Usage.- 4 Looped Schedules.- 4.1 Looped Schedule Terminology and Notation.- 4.2 Buffering Model.- 4.3 Clustering SDF Subgraphs.- 4.4 Factoring Schedule Loops.- 4.5 Reduced Single Appearance Schedules.- 4.6 Subindependence.- 4.7 Computation Graphs.- 5 Loose Interdependence Algorithms.- 5.1 Loose Interdependence Algorithms.- 5.2 Modem Example.- 5.3 Clustering in a Loose Interdependence Algorithm.- 5.4 Relation to Vectorization.- 6 Joint Code and Data Minimization.- 6.1 R-Schedules.- 6.2 The Buffer Memory Lower Bound for Single Appearance Schedules.- 6.3 Dynamic Programming Post Optimization.- 6.4 Recursive Partitioning by Minimum Cuts (RPMC).- 6.5 Non-uniform Filterbank Example.- 7 Pairwise Grouping of Adjacent Nodes.- 7.1 Proper Clustering.- 7.2 The Optimality of APGAN for a Class of Graphs.- 7.3 Examples.- 8 Experiments.- 9 Open Issues.- 9.1 Tightly Interdependent Graphs.- 9.2 Buffering.- 9.3 Parallel Computation.Springer-Verlag KG, Sachsenplatz 4-6, 1201 Wien 206 pp. Englisch. N� de r�f. du vendeur 9780792397229

Contacter le vendeur

Acheter neuf

EUR 106,99

Exp�dition �EUR 60
Exp�dition depuis Allemagne vers Etats-Unis

Quantit� disponible : 1 disponible(s)

Ajouter au panier

Image fournie par le vendeur

Software Synthesis from Dataflow Graphs

Shuvra S. Bhattacharyya

Edit� par Springer US Mai 1996, 1996

ISBN 10 : 0792397223 ISBN 13 : 9780792397229

Neuf Couverture rigide

impression � la demande

Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne

�valuation du vendeur 5 sur 5 �toiles

Buch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Software Synthesis from Dataflow Graphs addresses the problem of generating efficient software implementations from applications specified as synchronous dataflow graphs for programmable digital signal processors (DSPs) used in embedded real- time systems. The advent of high-speed graphics workstations has made feasible the use of graphical block diagram programming environments by designers of signal processing systems. A particular subset of dataflow, called Synchronous Dataflow (SDF), has proven efficient for representing a wide class of unirate and multirate signal processing algorithms, and has been used as the basis for numerous DSP block diagram-based programming environments such as the Signal Processing Workstation from Cadence Design Systems, Inc., COSSAP from Synopsys� (both commercial tools), and the Ptolemy environment from the University of California at Berkeley. A key property of the SDF model is that static schedules can be determined at compile time. This removes the overhead of dynamic scheduling and is thus useful for real-time DSP programs where throughput requirements are often severe. Another constraint that programmable DSPs for embedded systems have is the limited amount of on-chip memory. Off-chip memory is not only expensive but is also slower and increases the power consumption of the system; hence, it is imperative that programs fit in the on-chip memory whenever possible. Software Synthesis from Dataflow Graphs reviews the state-of-the-art in constructing static, memory-optimal schedules for programs expressed as SDF graphs. Code size reduction is obtained by the careful organization of loops in the target code. Data buffering is optimized by constructing the loop hierarchy in provably optimal ways for many classes of SDF graphs. The central result is a uniprocessor scheduling framework that provably synthesizes the most compact looping structures, called single appearance schedules, for a certain class of SDF graphs. In addition, algorithms and heuristics are presented that generate single appearance schedules optimized for data buffering usage. Numerous practical examples and extensive experimental data are provided to illustrate the efficacy of these techniques. 206 pp. Englisch. N� de r�f. du vendeur 9780792397229

Contacter le vendeur

Acheter neuf

EUR 106,99

Exp�dition �EUR 23
Exp�dition depuis Allemagne vers Etats-Unis

Quantit� disponible : 2 disponible(s)

Ajouter au panier

Image fournie par le vendeur

Software Synthesis from Dataflow Graphs

Shuvra S. Bhattacharyya

Edit� par Springer, Springer, 1996

ISBN 10 : 0792397223 ISBN 13 : 9780792397229

Neuf Couverture rigide

Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne

�valuation du vendeur 5 sur 5 �toiles

Buch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - Software Synthesis from Dataflow Graphs addresses the problem of generating efficient software implementations from applications specified as synchronous dataflow graphs for programmable digital signal processors (DSPs) used in embedded real- time systems. The advent of high-speed graphics workstations has made feasible the use of graphical block diagram programming environments by designers of signal processing systems. A particular subset of dataflow, called Synchronous Dataflow (SDF), has proven efficient for representing a wide class of unirate and multirate signal processing algorithms, and has been used as the basis for numerous DSP block diagram-based programming environments such as the Signal Processing Workstation from Cadence Design Systems, Inc., COSSAP from Synopsys� (both commercial tools), and the Ptolemy environment from the University of California at Berkeley. A key property of the SDF model is that static schedules can be determined at compile time. This removes the overhead of dynamic scheduling and is thus useful for real-time DSP programs where throughput requirements are often severe. Another constraint that programmable DSPs for embedded systems have is the limited amount of on-chip memory. Off-chip memory is not only expensive but is also slower and increases the power consumption of the system; hence, it is imperative that programs fit in the on-chip memory whenever possible. Software Synthesis from Dataflow Graphs reviews the state-of-the-art in constructing static, memory-optimal schedules for programs expressed as SDF graphs. Code size reduction is obtained by the careful organization of loops in the target code. Data buffering is optimized by constructing the loop hierarchy in provably optimal ways for many classes of SDF graphs. The central result is a uniprocessor scheduling framework that provably synthesizes the most compact looping structures, called singleappearance schedules, for a certain class of SDF graphs. In addition, algorithms and heuristics are presented that generate single appearance schedules optimized for data buffering usage. Numerous practical examples and extensive experimental data are provided to illustrate the efficacy of these techniques. N� de r�f. du vendeur 9780792397229

Contacter le vendeur