System-on-a-Chip Verification: Methodology and Techniques

Rashinkar, Prakash; Paterson, Peter; Singh, Leena

ISBN 10: 0792372794 / ISBN 13: 9780792372790

Edité par Kluwer Academic Publishers, 2001

A propos de cet article

System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application. System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter: Explanation of the objective involved in performing verification after a given design step; Features of options available; When to use a particular option; How to select an option; and Limitations of the option. This exciting new book will be of interest to all designers and test professionals. Fine.

N° de réf. du vendeur ABE-1629312173661

Détails bibliographiques

• Titre: System-on-a-Chip Verification: Methodology and Techniques
• Éditeur: Kluwer Academic Publishers
• Date de parution: 2001
• Langue: anglais
• ISBN à 10 chiffres: 0792372794
• ISBN à 13 chiffres: 9780792372790
• Reliure: Hardcover
• État de l'article: Fine

A propos de ce titre

Synopsis

System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application.
System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter:

1. Explanation of the objective involved in performing verification after a given design step;
2. Features of options available;
3. When to use a particular option;
4. How to select an option; and
5. Limitations of the option.

This exciting new book will be of interest to all designers and test professionals.