System-on-a-Chip Verification

Rashinkar, Prakash; Paterson, Peter; Singh, Leena

ISBN 10: 0792372794 ISBN 13: 9780792372790
Edité par Kluwer Academic Publishers, 2000
Neuf(s) Couverture rigide

Vendeur Kennys Bookstore, Olney, MD, Etats-Unis Évaluation du vendeur 5 sur 5 étoiles Evaluation 5 étoiles, En savoir plus sur les évaluations des vendeurs

Vendeur AbeBooks depuis 9 octobre 2009


A propos de cet article

Description :

Covers verification strategies and methodologies for SOC verification from system level verification to the design sign-off. This book contains topics including: Introduction to the SOC design and verification aspects; System level verification in brief; Block level verification; Analog/mixed signal simulation; and Simulation. Num Pages: 372 pages, 22 black & white illustrations, biography. BIC Classification: T; UY. Category: (P) Professional & Vocational; (UP) Postgraduate, Research & Scholarly. Dimension: 243 x 164 x 29. Weight in Grams: 796. . 2000. Hardback. . . . . Books ship from the US and Ireland. N° de réf. du vendeur V9780792372790

Signaler cet article

Synopsis :

System-On-a-Chip Verification: Methodology and Techniques is the first book to cover verification strategies and methodologies for SOC verification from system level verification to the design sign- off. The topics covered include Introduction to the SOC design and verification aspects, System level verification in brief, Block level verification, Analog/mixed signal simulation, Simulation, HW/SW Co-verification, Static netlist verification, Physical verification, and Design sign-off in brief. All the verification aspects are illustrated with a single reference design for Bluetooth application.
System-On-a-Chip Verification: Methodology and Techniques takes a systematic approach that covers the following aspects of verification strategy in each chapter:

  1. Explanation of the objective involved in performing verification after a given design step;
  2. Features of options available;
  3. When to use a particular option;
  4. How to select an option; and
  5. Limitations of the option.
This exciting new book will be of interest to all designers and test professionals.

Les informations fournies dans la section « A propos du livre » peuvent faire référence à une autre édition de ce titre.

Détails bibliographiques

Titre : System-on-a-Chip Verification
Éditeur : Kluwer Academic Publishers
Date d'édition : 2000
Reliure : Couverture rigide
Etat : New

Meilleurs résultats de recherche sur AbeBooks

There are 3 autres exemplaires de ce livre sont disponibles

Afficher tous les résultats pour ce livre