Verilog HDL, 2e

Palnitkar

ISBN 10: 0130449113 / ISBN 13: 9780130449115

Edité par Prentice Hall, 2003

A propos de cet article

Brand New. Soft Cover International Edition. Different ISBN and Cover Image. Priced lower than the standard editions which is usually intended to make them more affordable for students abroad. The core content of the book is generally the same as the standard edition. The country selling restrictions may be printed on the book but is no problem for the self-use. This Item maybe shipped from US or any other country as we have multiple locations worldwide.

N° de réf. du vendeur ABNR-4012

Détails bibliographiques

• Titre: Verilog HDL, 2e
• Éditeur: Prentice Hall
• Date de parution: 2003
• Langue: anglais
• ISBN à 10 chiffres: 0130449113
• ISBN à 13 chiffres: 9780130449115
• Reliure: Couverture souple
• Édition: Edition internationale
• État de l'article: New

A propos de ce titre

Synopsis

Verilog HDL is a language for digital design, just as C is a language for programming. This complete Verilog HDL reference progresses from the basic Verilog concepts to the most advanced concepts in digital design. Palnitkar covers the gamut of Verilog HDL fundamentals, such as gate, RTL, and behavioral modeling, all the way to advanced concepts, such as timing simulation, switch level modeling, PLI, and logic synthesis. Verilog HDL is a hardware description language (with a user community of more than 50,000 active designers) used to design and document electronic systems. This completely updated reference progresses from basic to advanced concepts in digital design, including timing simulation, switch level modeling, PLI, and logic synthesis.

À propos de l?auteur

About the Author

Samir Palnitkar is a recognized authority on Verilog HDL, modeling, verification, logic synthesis, and EDA-based methodologies in digital design. He has worked extensively with design and verification on various successful microprocessor, ASIC, and system projects. He was the lead developer of the Verilog framework for the shared memory, cache coherent, multiprocessor architecture, popularly known as the UltraSPARCTM Port Architecture, defined for Sun's next generation UltraSPARC-based desktop systems. Besides the UltraSPARC CPU, he has worked on a number of diverse design and verification projects at leading companies including Cisco, Philips, Mitsubishi, Motorola, National, Advanced Micro Devices, and Standard Microsystems.