Offers a comprehensive description of the architectural techniques to tackle the soft error problem. This book covers methodologies for quantitative analysis of soft errors as well as cost-effective architectural techniques to mitigate them. It also delves into the physics of soft errors and reviews circuit and software mitigation techniques.

Pr�sentation de l'�diteur:

Architecture Design for Soft Errors provides a comprehensive description of the architectural techniques to tackle the soft error problem. It covers the new methodologies for quantitative analysis of soft errors as well as novel, cost-effective architectural techniques to mitigate them.

To provide readers with a better grasp of the broader problem definition and solution space, this book also delves into the physics of soft errors and reviews current circuit and software mitigation techniques. There are a number of different ways this book can be read or used in a course: as a complete course on architecture design for soft errors covering the entire book; a short course on architecture design for soft errors; and as a reference book on classical fault-tolerant machines.

This book is recommended for practitioners in semi-conductor industry, researchers and developers in computer architecture, advanced graduate seminar courses on soft errors, and (iv) as a reference book for undergraduate courses in computer architecture.

Helps readers build-in fault tolerance to the billions of microchips produced each year, all of which are subject to soft errors
Shows readers how to quantify their soft error reliability
Provides state-of-the-art techniques to protect against soft errors

Les informations fournies dans la section � A propos du livre � peuvent faire r�f�rence � une autre �dition de ce titre.

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