Closing the Power Gap between ASIC and Custom : Tools and Techniques for Low Power Design

Chinnery, David; Keutzer, Kurt

ISBN 10: 1441938338 / ISBN 13: 9781441938336

Edité par New York, New York, U.S.A.: Springer, 2010

A propos de cet article

Book is listed only as a good reading copy due to some light coffee staining that affects about three pages of text and two inches of the leading edge of the page block. The binding of the book is tight and there is just light general wear to the covers; 1st printing stated. 8vo., 384 pages. Language: eng Language: eng 0.0 Language: eng 0.0 Language: eng Language: eng.

N° de réf. du vendeur 23343

Détails bibliographiques

• Titre: Closing the Power Gap between ASIC and Custom : Tools and Techniques for Low Power Design
• Éditeur: New York, New York, U.S.A.: Springer
• Date de parution: 2010
• Langue: anglais
• ISBN à 10 chiffres: 1441938338
• ISBN à 13 chiffres: 9781441938336
• Reliure: Soft cover
• Édition: 1st Edition.
• État de l'article: Good
• Catalogues du vendeur:
  • SCIENCE
  • MATHEMATICS AND ENGINEERING
  • TECHNOLOGY AND TECHNICAL

A propos de ce titre

Synopsis

Until recently, ASIC designers have mostly focused on how to achieve the desired performance requirements, and the typical ASIC design flow pays limited attention to power. In comparison, some custom designs have significantly advanced techniques for low power, such as voltage islands, substrate biasing, and sleep mode power gating. Butt custom designed chips can achieve low power at the same performance compared to ASIC chips designed in an EDA flow. In Closing the POWER Gap between ASIC & Custom, the significance of different low power design approaches is explored in detail. This book covers how to use low power design approaches in an automated design flow, and examine the design time and performance trade-offs of low power design. After chapter which outline factors affecting the power consumption of ASIC and custom designs and explore how each factor can contribute to custom designs being lower power than ASICs, the book focuses on the latest tools and techniques for low power design that may be applied in an ASIC design flow.