INTRODUCTION TO ADVANCED SYSTEM-ON-CHIP TEST DESIGN AND OPTIMIZATION

Larsson, Erik

ISBN 10: 1402032072 / ISBN 13: 9781402032073

Edité par Springer-Verlag, Netherlands, 2005

A propos de cet article

(NETH) Presumed 1st edition Ownership stamp to top edge of pages, small ownerhsip label to the back of the cover, no other markings, Near Fine; no dust jacket as published. Hardcover, 388pp, index, diagrams. This book gives an introduction to testing, describes the problems related to SOC testing, discusses the modeling granularity and the implementation into EDA (electronic design automation) tools. The book is divided into three sections: i) test concepts, ii) SOC design for test, and iii) SOC test applications. The first part covers an introduction into test problems including faults, fault types, design-flow, design-for-test techniques such as scan-testing and Boundary Scan. The second part of the book discusses SOC related problems such as system modeling, test conflicts, power consumption, test access mechanism design, test scheduling and defect-oriented scheduling. Finally, the third part focuses on SOC applications, such as integrated test scheduling and TAM design, defect-oriented scheduling, and integrating test design with the core selection process. (2.5 JM 0322 Size: 8vo - over 7¾" - 9¾".

N° de réf. du vendeur 07175

Détails bibliographiques

• Titre: INTRODUCTION TO ADVANCED SYSTEM-ON-CHIP TEST DESIGN AND OPTIMIZATION
• Éditeur: Springer-Verlag, Netherlands
• Date de parution: 2005
• Langue: anglais
• ISBN à 10 chiffres: 1402032072
• ISBN à 13 chiffres: 9781402032073
• Reliure: Hardcover
• Édition: 1st.
• État de l'article: Near Fine
• État de la jaquette: No Dust Jacket
• Catalogues du vendeur:
  • Math, Science,Technology,Physics, Engineering

A propos de ce titre

Synopsis

SOC test design and its optimization is the topic of this book, and the aim is to give an introduction to testing, describe the problems related to SOC testing, discuses the modeling granularity and the implementation into EDA (electronic design automation) tools. It first introduces readers to test problems including faults, fault types, design-flow, design-for-test techniques such as scan-testing and Boundary Scan. Then it discusses SOC related problems such as system modeling, test conflicts, power consumption, test access mechanism design, test scheduling and defect-oriented scheduling. The final part focuses on SOC applications, such as integrated test scheduling and TAM design, defect-oriented scheduling, and integrating test design with core selection process. Intended for graduate students and PhD-students working in the test field, the manual also aids researchers and professors who would like to get into the area of SOC testing.

À propos de l?auteur

Dr. Erik Larsson is an assistant professor at Linköpings University in Sweden, and he is an active member of the IEEE Testing and Circuits & Systems societies