Testing of Digital Systems. Cet article n’est pas disponible.
Langue : anglais
Edité par Cambridge University Press, 2003
- Éd. originale
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Vendeur : Better World Books Ltd, Dunfermline, Royaume-UniBetter World Books Ltd
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A propos de cet article
Former library copy. Pages intact with possible writing/highlighting. Binding strong with minor wear. Dust jackets/supplements may not be included. Includes library markings. Stock photo provided. Product includes identifying sticker. Better World Books: Buy Books. Do Good.
N° de réf. du vendeur 16456042-6
- Titre
- Testing of Digital Systems
- Auteur
- Jha, Niraj, Gupta, Sandeep
- Éditeur
- Cambridge University Press
- Année de publication
- 2003
- État de l'article
- Very Good
- Reliure
- Couverture rigide
- Langue
- anglais
- ISBN à 10 chiffres
- 0521773563
- ISBN à 13 chiffres
- 9780521773560
- Édition
- 1st Edition.
- Poids de l'article
- 4,817 livres
- Dimensions
- N/A
Device testing represents the single largest manufacturing expense in the semiconductor industry, costing over $40 billion a year. The most comprehensive and wide ranging book of its kind, Testing of Digital Systems covers everything you need to know about this vitally important subject. Starting right from the basics, the authors take the reader through automatic test pattern generation, design for testability and built-in self-test of digital circuits before moving on to more advanced topics such as IDDQ testing, functional testing, delay fault testing, memory testing, and fault diagnosis. The book includes detailed treatment of the latest techniques including test generation for various fault models, discussion of testing techniques at different levels of integrated circuit hierarchy and a chapter on system-on-a-chip test synthesis. Written for students and engineers, it is both an excellent senior/graduate level textbook and a valuable reference.
« Synopsis » peut appartenir à une autre édition de cet ouvrage.
À propos de l’auteur
Niraj Jha is Professor of Electrical Engineering at Princeton University and head of the Center of Embedded System-on-a-Chip Design, where his current research is focussed on the synthesis and testing of these devices. He is a fellow of IEEE, associate editor of IEEE Transactions on VLSI Systems and The Journal of Electronic Testing: Theory and Applications (JETTA) and a recipient of the AT&T Foundation award and the NEC preceptorship award for research excellence.
Sandeep Gupta is an Associate Professor in the Department of Electrical Engineering at the University of Southern California, USA. He is Co-Director of the M.S. Program in VLSI Design, with research interests in the area of VLSI testing and design. He is a member of the IEEE.
Sandeep Gupta is an Associate Professor in the Department of Electrical Engineering at the University of Southern California, USA. He is Co-Director of the M.S. Program in VLSI Design, with research interests in the area of VLSI testing and design. He is a member of the IEEE.
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