Testing Semiconductor Memories - Couverture rigide

Goor, A.J.Van De

 
9780471925866: Testing Semiconductor Memories

Synopsis

Comprehensive coverage of memory test problems at chip, array and board level is provided in this book. For each of these test levels a class of fault models is introduced along with tests for these models. The author also presents algorithms of relevant fault models, together with proofs of their correctness. Special attention is given to why a fault model belongs to a particular class and why it is of interest. A software package, suitable for use on IBM PCs and compatibles,is also available which consists of a set of memory test programs and a simulation package demonstrating how the algorithms are executed and the relationship of the algorithm with the memory.

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Autres éditions populaires du même titre

9780471925873: Testing Semiconductor Memories

Edition présentée

ISBN 10 :  047192587X ISBN 13 :  9780471925873
Editeur : John Wiley & Sons Ltd, 1991
Couverture souple