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This book presents a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation.
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Description du livre Etat : Brand New. New. US edition. Expediting shipping for all USA and Europe orders excluding PO Box. Excellent Customer Service. N° de réf. du vendeur ABEOCT23-242883
Description du livre Etat : Brand New. New. US edition. Expediting shipping for all USA and Europe orders excluding PO Box. Excellent Customer Service. N° de réf. du vendeur ABEOCT23-125602
Description du livre Etat : New. Brand New Original US Edition.We Ship to PO BOX Address also. EXPEDITED shipping option also available for faster delivery.This item may ship from the US or other locations in India depending on your location and availability. N° de réf. du vendeur ABTR-225240
Description du livre Etat : New. Brand New Original US Edition. Customer service! Satisfaction Guaranteed. This item may ship from the US or our Overseas warehouse depending on your location and stock availability. We Ship to PO BOX Location also. N° de réf. du vendeur ABRR-225240
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Description du livre Buch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The ever increasing complexity of modern electronic devices together with the continually shrinking time-to-market and product lifetimes pose enormous chip design challenges to meet flexibility, performance and energy efficiency constraints. As a consequence, the current trend is towards programmable platforms (Multi-Processor System-on-Chip Platforms, MP-SoC), which are tailored to the respective target application. In the usual case, a new platform is designed by selecting and assembling standard platform elements.However, best results can only be achieved if the processor cores and the communication modules themselves are also optimized for the target application. Effective exploration is only possible if accurate module simulators are generated automatically based on abstract specifications. As a matter of fact, CoWare's BusCompiler allows generating accurate simulators for communication modules, and modeling languages such as LISA enable the same for processor cores.In Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms, such originally independent approaches are combined in order to enable the development of highly optimized programmable platforms.The first chapters of this book summarize the state of the art in all three involved fields separately: general system level design, communication modeling, and processor modeling. The main chapters then present a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation. 162 pp. Englisch. N° de réf. du vendeur 9781402085741
Description du livre Gebunden. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. New methodology with potential for obtaining best results in MP-SoC designMost detailed book about retargetable processor system integrationSeparate, elaborated introduction into state of the art for all 3 involved fieldsBoth Prof. . N° de réf. du vendeur 4095588
Description du livre Buch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - The ever increasing complexity of modern electronic devices together with the continually shrinking time-to-market and product lifetimes pose enormous chip design challenges to meet flexibility, performance and energy efficiency constraints. As a consequence, the current trend is towards programmable platforms (Multi-Processor System-on-Chip Platforms, MP-SoC), which are tailored to the respective target application. In the usual case, a new platform is designed by selecting and assembling standard platform elements.However, best results can only be achieved if the processor cores and the communication modules themselves are also optimized for the target application. Effective exploration is only possible if accurate module simulators are generated automatically based on abstract specifications. As a matter of fact, CoWare's BusCompiler allows generating accurate simulators for communication modules, and modeling languages such as LISA enable the same for processor cores.In Retargetable Processor System Integration into Multi-Processor System-on-Chip Platforms, such originally independent approaches are combined in order to enable the development of highly optimized programmable platforms.The first chapters of this book summarize the state of the art in all three involved fields separately: general system level design, communication modeling, and processor modeling. The main chapters then present a methodology and the associated tooling for enabling design space exploration as well as a successive refinement flow for the design of optimized MP-SoCs with a high degree of automation. N° de réf. du vendeur 9781402085741
Description du livre Hardback. Etat : New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days. N° de réf. du vendeur C9781402085741