VLSI Test Principles and Architectures: Design for Testability (The Morgan Kaufmann Series In Systems On Silicon)

Wang, Laung-Terng, Cheng-Wen Wu and Xiaoqing Wen:

ISBN 10: 0123705975 / ISBN 13: 9780123705976

Edité par Morgan Kaufmann, 2006

A propos de cet article

777 S. Einband hinten leicht eingedrückt. Schnitt unten dezent fleckig. Mit Bibliothek-Stempel. 518 Sprache: Englisch Gewicht in Gramm: 1800 Gebundene Ausgabe, Maße: 20.62 cm x 5.23 cm x 23.83 cm.

N° de réf. du vendeur 34773

Détails bibliographiques

• Titre: VLSI Test Principles and Architectures: Design for Testability (The Morgan Kaufmann Series In Systems On Silicon)
• Éditeur: Morgan Kaufmann
• Date de parution: 2006
• Langue: anglais
• ISBN à 10 chiffres: 0123705975
• ISBN à 13 chiffres: 9780123705976
• Reliure: Couverture rigide
• État de l'article: Gut
• Catalogues du vendeur:
  • Varia

A propos de ce titre

Synopsis

This book is a comprehensive guide to new DFT methods that will show the readers how to design a testable and quality product, drive down test cost, improve product quality and yield, and speed up time-to-market and time-to-volume.

À propos des auteurs

Laung-Terng Wang, Ph.D., is founder, chairman, and chief executive officer of SynTest Technologies, CA. He received his EE Ph.D. degree from Stanford University. A Fellow of the IEEE, he holds 18 U.S. Patents and 12 European Patents, and has co-authored/co-edited two internationally used DFT textbooks- VLSI Test Principles and Architectures (2006) and System-on-Chip Test Architectures (2007).

Kwang-Ting (Tim) Cheng, Ph.D., is a Professor and Chair of the Electrical and Computer Engineering Department at the University of California, Berkeley. A Fellow of the IEEE, he has published over 300 technical papers, co-authored three books, and holds 11 U.S. Patents.