Verilog by Example: A Concise Introduction for FPGA Design

Blaine Readler

ISBN 10: 0983497303 / ISBN 13: 9780983497301

Edité par Full ARC Press, 2011

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This item is printed on demand. New copy - Usually dispatched within 5-9 working days 270.

N° de réf. du vendeur C9780983497301

Détails bibliographiques

• Titre: Verilog by Example: A Concise Introduction for FPGA Design
• Éditeur: Full ARC Press
• Date de parution: 2011
• Langue: anglais
• ISBN à 10 chiffres: 0983497303
• ISBN à 13 chiffres: 9780983497301
• Reliure: Paperback / softback
• État de l'article: New

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Synopsis

A practical primer for the student and practicing engineer already familiar with the basics of digital design, the reference develops a working grasp of the verilog hardware description language step-by-step using easy-to-understand examples. Starting with a simple but workable design sample, increasingly more complex fundamentals of the language are introduced until all major features of verilog are brought to light. Included in the coverage are state machines, modular design, FPGA-based memories, clock management, specialized I/O, and an introduction to techniques of simulation. The goal is to prepare the reader to design real-world FPGA solutions. All the sample code used in the book is available online. What Strunk and White did for the English language with "The Elements of Style," VERILOG BY EXAMPLE does for FPGA design.