Wafer-Level Chip-Scale Packaging : Analog and Power Semiconductor Applications

Yong Liu

ISBN 10: 1493954385 / ISBN 13: 9781493954384

Edité par Springer New York, Springer New York, 2016

A propos de cet article

Druck auf Anfrage Neuware - Printed after ordering - Analog and Power Wafer Level Chip Scale Packaging presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Since the analog and power electronic wafer level packaging is different from regular digital and memory IC package, this book will systematically introduce the typical analog and power electronic wafer level packaging design, assembly process, materials, reliability and failure analysis, and material selection. Along with new analog and power WLCSP development, the roleof modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical and stress modeling methodologies is also presented in the book.

N° de réf. du vendeur 9781493954384

Détails bibliographiques

• Titre: Wafer-Level Chip-Scale Packaging : Analog and Power Semiconductor Applications
• Éditeur: Springer New York, Springer New York
• Date de parution: 2016
• Langue: anglais
• ISBN à 10 chiffres: 1493954385
• ISBN à 13 chiffres: 9781493954384
• Reliure: Taschenbuch
• État de l'article: Neu
• Dimensions: 235 L x 155 H x 18 P (en millimètres) 235 millimètres de largeur par 155 millimètres de hauteur par 18 millimètres de profondeur
• Poids: 578 grammes

A propos de ce titre

Synopsis

Analog and Power Wafer Level Chip Scale Packaging presents a state-of-art and in-depth overview in analog and power WLCSP design, material characterization, reliability and modeling. Recent advances in analog and power electronic WLCSP packaging are presented based on the development of analog technology and power device integration. The book covers in detail how advances in semiconductor content, analog and power advanced WLCSP design, assembly, materials and reliability have co-enabled significant advances in fan-in and fan-out with redistributed layer (RDL) of analog and power device capability during recent years. Since the analog and power electronic wafer level packaging is different from regular digital and memory IC package, this book will systematically introduce the typical analog and power electronic wafer level packaging design, assembly process, materials, reliability and failure analysis, and material selection. Along with new analog and power WLCSP development, the roleof modeling is a key to assure successful package design. An overview of the analog and power WLCSP modeling and typical thermal, electrical and stress modeling methodologies is also presented in the book.