Interconnect Noise Optimization in Nanometer Technologies (Paperback)

Mohamed Elgamel

ISBN 10: 1441938443 / ISBN 13: 9781441938442

Edité par Springer-Verlag New York Inc., New York, NY, 2010

A propos de cet article

Paperback. Interconnect has become the dominating factor in determining system performance in nanometer technologies. Dedicated to this subject, Interconnect Noise Optimization in Nanometer Technologies provides insight and intuition into layout analysis and optimization for interconnect in high speed, high complexity integrated circuits.The authors bring together a wealth of information presenting a range of CAD algorithms and techniques for synthesizing and optimizing interconnect. Practical aspects of the algorithms and the models are explained with sufficient details. The book investigates the most effective parameters in layout optimization. Different post-layout optimization techniques with complexity analysis and benchmarks tests are provided. The impact crosstalk noise and coupling on the wire delay is analyzed. Parameters that affect signal integrity are also considered. Presents a range of CAD algorithms and techniques for synthesizing and optimizing interconnectProvides insight & intuition into layout analysis and optimization for interconnect in high speed, high complexity integrated circuits Shipping may be from multiple locations in the US or from the UK, depending on stock availability.

N° de réf. du vendeur 9781441938442

Détails bibliographiques

• Titre: Interconnect Noise Optimization in Nanometer Technologies (Paperback)
• Éditeur: Springer-Verlag New York Inc., New York, NY
• Date de parution: 2010
• Langue: anglais
• ISBN à 10 chiffres: 1441938443
• ISBN à 13 chiffres: 9781441938442
• Reliure: Paperback
• Édition: Edition originale
• État de l'article: new

A propos de ce titre

Synopsis

This book provides insight into the use of CAD for layout analysis and optimization of interconnect in high speed, high complexity integrated circuits, which have become the dominating factor in determining system performance in nanometer technologies. The text investigates the effects on system performance and reliability of wire size, spacing, wire length, coupling length, load capacitance, rise time of the inputs, place of overlap, frequency, shields, signal direction and wire width for both the aggressors and the victim wires. The authors present a range of CAD algorithms and techniques for synthesizing and optimizing interconnect.

Présentation de l'éditeur

Presents a range of CAD algorithms and techniques for synthesizing and optimizing interconnect Provides insight & intuition into layout analysis and optimization for interconnect in high speed, high complexity integrated circuits