Edité par Kluwer Academic Publishers, 1986
ISBN 10 : 089838205X ISBN 13 : 9780898382051
Langue: anglais
Vendeur : Friends of the Library Bookstore, Eau Claire, WI, Etats-Unis
EUR 20,04
Autre deviseQuantité disponible : 1 disponible(s)
Ajouter au panierHardcover. Etat : Good. No Jacket. A used textbook that has a coffee-colored stain on the top edge. The pages are otherwise clean and unmarked. The spine is slightly cocked and shows some shelf wear on the top and bottom. A few handling marks on the back cover. The corners are sharp. 159 p. "Routing of VLSI chips is an important, time-consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality." Not ex-library. Shelf: B-1.
Edité par Kluwer Academic Publishers, 1986
ISBN 10 : 089838205X ISBN 13 : 9780898382051
Langue: anglais
Vendeur : Ammareal, Morangis, France
Quantité disponible : 1 disponible(s)
Ajouter au panierHardcover. Etat : Bon. Ancien livre de bibliothèque. Traces d'usure sur la couverture. Edition 1986. Ammareal reverse jusqu'à 15% du prix net de cet article à des organisations caritatives. ENGLISH DESCRIPTION Book Condition: Used, Good. Former library book. Signs of wear on the cover. Edition 1986. Ammareal gives back up to 15% of this item's net price to charity organizations.
Vendeur : BOOKWEST, Phoenix, AZ, Etats-Unis
EUR 73,22
Autre deviseQuantité disponible : 1 disponible(s)
Ajouter au panierHardcover. Etat : New. US SELLER SHIPS FAST FROM USA.
Edité par Kluwer Academic Publishers, 1985
ISBN 10 : 089838205X ISBN 13 : 9780898382051
Langue: anglais
Vendeur : Ammareal, Morangis, France
Quantité disponible : 1 disponible(s)
Ajouter au panierHardcover. Etat : Très bon. Ancien livre de bibliothèque. Légères traces d'usure sur la couverture. Salissures sur la tranche. Edition 1985. Ammareal reverse jusqu'à 15% du prix net de cet article à des organisations caritatives. ENGLISH DESCRIPTION Book Condition: Used, Very good. Former library book. Slight signs of wear on the cover. Stains on the edge. Edition 1985. Ammareal gives back up to 15% of this item's net price to charity organizations.
Vendeur : Lucky's Textbooks, Dallas, TX, Etats-Unis
EUR 106,23
Autre deviseQuantité disponible : Plus de 20 disponibles
Ajouter au panierEtat : New.
Vendeur : Lucky's Textbooks, Dallas, TX, Etats-Unis
EUR 106,58
Autre deviseQuantité disponible : Plus de 20 disponibles
Ajouter au panierEtat : New.
Vendeur : Ria Christie Collections, Uxbridge, Royaume-Uni
EUR 118,88
Autre deviseQuantité disponible : Plus de 20 disponibles
Ajouter au panierEtat : New. In.
Vendeur : Ria Christie Collections, Uxbridge, Royaume-Uni
EUR 118,88
Autre deviseQuantité disponible : Plus de 20 disponibles
Ajouter au panierEtat : New. In.
EUR 112,77
Autre deviseQuantité disponible : 1 disponible(s)
Ajouter au panierTaschenbuch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ignoring some of these factors and imposing unnecessary constraints in order to make routing tractable. In addition to the imposition of these restrictions, which simplify the problems to a degree but at the same time reduce the routing quality, traditional approaches use brute force. They often transform the problem into mathematical or graph problems and completely ignore the specific knowledge about the routing task that can greatly help the solution. This thesis overcomes some of the above problems and presents a system that performs routing close to what human designers do. In other words it heavily capitalizes on the knowledge of human expertise in this area, it does not impose unnecessary constraints, it considers all the different factors that affect the routing quality, and most importantly it allows constant user interaction throughout the routing process. To achieve the above, this thesis presents background about some representative techniques for routing and summarizes their characteristics. It then studies in detail the different factors (such as minimum area, number of vias, wire length, etc.) that affect the routing quality, and the different criteria (such as vertical/horizontal constraint graph, merging, minimal rectilinear Steiner tree, etc.) that can be used to optimize these factors.
Edité par Springer US, Springer New York, 1985
ISBN 10 : 089838205X ISBN 13 : 9780898382051
Langue: anglais
Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
EUR 114,36
Autre deviseQuantité disponible : 1 disponible(s)
Ajouter au panierBuch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ignoring some of these factors and imposing unnecessary constraints in order to make routing tractable. In addition to the imposition of these restrictions, which simplify the problems to a degree but at the same time reduce the routing quality, traditional approaches use brute force. They often transform the problem into mathematical or graph problems and completely ignore the specific knowledge about the routing task that can greatly help the solution. This thesis overcomes some of the above problems and presents a system that performs routing close to what human designers do. In other words it heavily capitalizes on the knowledge of human expertise in this area, it does not impose unnecessary constraints, it considers all the different factors that affect the routing quality, and most importantly it allows constant user interaction throughout the routing process. To achieve the above, this thesis presents background about some representative techniques for routing and summarizes their characteristics. It then studies in detail the different factors (such as minimum area, number of vias, wire length, etc.) that affect the routing quality, and the different criteria (such as vertical/horizontal constraint graph, merging, minimal rectilinear Steiner tree, etc.) that can be used to optimize these factors.
Vendeur : Mispah books, Redhill, SURRE, Royaume-Uni
EUR 165,61
Autre deviseQuantité disponible : 1 disponible(s)
Ajouter au panierPaperback. Etat : Like New. Like New. book.
Vendeur : moluna, Greven, Allemagne
EUR 92,27
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Ajouter au panierEtat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ign.
Vendeur : moluna, Greven, Allemagne
EUR 92,27
Autre deviseQuantité disponible : Plus de 20 disponibles
Ajouter au panierGebunden. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ign.
Edité par Springer-Verlag New York Inc., 2011
ISBN 10 : 1461296064 ISBN 13 : 9781461296065
Langue: anglais
Vendeur : THE SAINT BOOKSTORE, Southport, Royaume-Uni
EUR 138,14
Autre deviseQuantité disponible : Plus de 20 disponibles
Ajouter au panierPaperback / softback. Etat : New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days 390.
Edité par Kluwer Academic Publishers, 1985
ISBN 10 : 089838205X ISBN 13 : 9780898382051
Langue: anglais
Vendeur : THE SAINT BOOKSTORE, Southport, Royaume-Uni
EUR 138,14
Autre deviseQuantité disponible : Plus de 20 disponibles
Ajouter au panierHardback. Etat : New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days 571.
Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
EUR 155,10
Autre deviseQuantité disponible : 2 disponible(s)
Ajouter au panierTaschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ignoring some of these factors and imposing unnecessary constraints in order to make routing tractable. In addition to the imposition of these restrictions, which simplify the problems to a degree but at the same time reduce the routing quality, traditional approaches use brute force. They often transform the problem into mathematical or graph problems and completely ignore the specific knowledge about the routing task that can greatly help the solution. This thesis overcomes some of the above problems and presents a system that performs routing close to what human designers do. In other words it heavily capitalizes on the knowledge of human expertise in this area, it does not impose unnecessary constraints, it considers all the different factors that affect the routing quality, and most importantly it allows constant user interaction throughout the routing process. To achieve the above, this thesis presents background about some representative techniques for routing and summarizes their characteristics. It then studies in detail the different factors (such as minimum area, number of vias, wire length, etc.) that affect the routing quality, and the different criteria (such as vertical/horizontal constraint graph, merging, minimal rectilinear Steiner tree, etc.) that can be used to optimize these factors. 184 pp. Englisch.
Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
EUR 155,10
Autre deviseQuantité disponible : 2 disponible(s)
Ajouter au panierBuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Routing of VLSI chips is an important, time consuming, and difficult problem. The difficulty of the problem is attributed to the large number of often conflicting factors that affect the routing quality. Traditional techniques have approached routing by ignoring some of these factors and imposing unnecessary constraints in order to make routing tractable. In addition to the imposition of these restrictions, which simplify the problems to a degree but at the same time reduce the routing quality, traditional approaches use brute force. They often transform the problem into mathematical or graph problems and completely ignore the specific knowledge about the routing task that can greatly help the solution. This thesis overcomes some of the above problems and presents a system that performs routing close to what human designers do. In other words it heavily capitalizes on the knowledge of human expertise in this area, it does not impose unnecessary constraints, it considers all the different factors that affect the routing quality, and most importantly it allows constant user interaction throughout the routing process. To achieve the above, this thesis presents background about some representative techniques for routing and summarizes their characteristics. It then studies in detail the different factors (such as minimum area, number of vias, wire length, etc.) that affect the routing quality, and the different criteria (such as vertical/horizontal constraint graph, merging, minimal rectilinear Steiner tree, etc.) that can be used to optimize these factors. 184 pp. Englisch.