central processing unit (215 résultats)

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Taschenbuch. Etat : Neu. Front-Side Bus | Bus (Computing), Central Processing Unit, Back-Side Bus | Lambert M. Surhone (u. a.) | Taschenbuch | Englisch | 2026 | OmniScriptum | EAN 9786134635424 | Verantwortliche Person für die EU: preigu GmbH & Co. KG, Lengericher Landstr. 19, 49078 Osnabrück, mail[at]preigu[dot]de | Anbieter: preigu.

Taschenbuch. Etat : Neu. Neuware - High Quality Content by WIKIPEDIA articles! In computer architecture, a processor register (or general purpose register) is a small amount of storage available on the CPU whose contents can be accessed more quickly than storage available elsewhere. Typically, this specialized storage is not considered part of the normal memory range for the machine. Most, but not all, modern computers adopt the so-called load-store architecture. Under this paradigm data is 'shuffled' from subordinated memory- be it L# cache or RAM- into registers, 'crunched' therein by running instructions from the instruction set, then transferred out. A common property of computer programs is locality of reference: the same values are often accessed repeatedly; and holding these frequently used values in registers improves program execution performance.

Etat : Good. Carrollton, TX: Mostek, Inc., 1977. Sm 4to. 90pp. Illus. Good book. Spine darkened. Covers soiled. Corenrs fanned and creased at top corner. Inside clean. Inquire if you need further information.

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Taschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -The Central Processing Unit (CPU) or processor is the portion of a computer system that carries out the instructions of a computer program, and is the primary element carrying out the computer's functions. This term has been in use in the computer industry at least since the early 1960s (Weik 2007). The form, design and implementation of CPUs have changed dramatically since the earliest examples, but their fundamental operation remains much the same. Early CPUs were custom-designed as a part of a larger, sometimes one-of-a-kind, computer. However, this costly method of designing custom CPUs for a particular application has largely given way to the development of mass-produced processors that are made for one or many purposes. This standardization trend generally began in the era of discrete transistor mainframes and minicomputers and has rapidly accelerated with the popularization of the integrated circuit (IC). The IC has allowed increasingly complex CPUs to be designed and manufactured to tolerances on the order of nanometers Englisch.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! Very long instruction word or VLIW refers to a CPU architecture designed to take advantage of instruction level parallelism (ILP). A processor that executes every instruction one after the other (i.e. a non-pipelined scalar architecture) may use processor resources inefficiently, potentially leading to poor performance. The performance can be improved by executing different sub-steps of sequential instructions simultaneously (this is pipelining), or even executing multiple instructions entirely simultaneously as in superscalar architectures.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! In computing, promiscuous mode or promisc mode is a configuration of a network card that makes the card pass all traffic it receives to the central processing unit rather than just frames addressed to it a feature normally used for packet sniffing. Each frame includes the hardware (Media Access Control) address. When a network card receives a frame, it normally drops it unless the frame is addressed to that card. In promiscuous mode, however, the card allows all frames through, thus allowing the computer to read frame intended for other machines or network devices.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! The Harvard architecture is a computer architecture with physically separate storage and signal pathways for instructions and data. The term originated from the Harvard Mark I relay-based computer, which stored instructions on punched tape (24 bits wide) and data in electro-mechanical counters. These early machines had limited data storage, entirely contained within the central processing unit, and provided no access to the instruction storage as data, making loading and modifying programs an entirely offline process. Today, most processors implement such separate signal pathways for performance reasons but actually implement a Modified Harvard architecture, so they can support tasks like loading a program from disk storage as data and then executing it.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. Mark E. Dean is an inventor and a computer engineer. He led the team that developed the ISA bus, and he led the design team responsible for creating the first one-gigahertz computer processor chip. He holds three of IBM's original nine PC patents. In August 2011, writing in his blog, Dean stated that he now uses a tablet computer instead of a PC. Born in Jefferson City, Tennessee, Dean holds a bachelor's degree in electrical engineering from the University of Tennessee, a master's degree in electrical engineering from Florida Atlantic University and a Ph.D. in electrical engineering from Stanford University.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. FIFO is an acronym for First In, First Out, an abstraction in ways of organizing and manipulation of data relative to time and prioritization. This expression describes the principle of a queue processing technique or servicing conflicting demands by ordering process by first-come, first-served (FCFS) behaviour: what comes in first is handled first, what comes in next waits until the first is finished, etc. Thus it is analogous to the behaviour of persons queueing (or 'standing in line', in common American parlance), where the persons leave the queue in the order they arrive, or waiting one''s turn at a traffic control signal. FCFS is also the shorthand name (see Jargon and acronym) for the FIFO operating system scheduling algorithm, which gives every process CPU time in the order they come. In the broader sense, the abstraction LIFO, or Last-In-First-Out is the opposite of the abstraction FIFO organization, the difference perhaps is clearest with considering the less commonly used synonym of LIFO, FILO meaning First-In-Last-Out. In essence, both are specific cases of a more generalized list (which could be accessed anywhere).

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. A computer fan is any fan inside a computer case used for cooling purposes, and may refer to fans that draw cooler air into the case from the outside, expel warm air from inside, or move air across a heatsink to cool a particular component. The use of fans to cool a computer is an example of active cooling.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! A vector processor, or array processor, is a central processing unit (CPU) that implements an instruction set containing instructions that operate on one-dimensional arrays of data called vectors. This is in contrast to a scalar processor, whose instructions operate on single data items. The vast majority of CPUs are scalar. Vector processors first appeared in the 1970s, and formed the basis of most supercomputers through the 1980s and into the 1990s. Improvements in scalar processors, particularly microprocessors, resulted in the decline of traditional vector processors in supercomputers, and the appearance of vector processing techniques in mass market CPUs around the early 1990s.

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Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! An instruction pipeline is a technique used in the design of computers and other digital electronic devices to increase their instruction throughput (the number of instructions that can be executed in a unit of time). The fundamental idea is to split the processing of a computer instruction into a series of independent steps, with storage at the end of each step.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! A superscalar CPU architecture implements a form of parallelism called instruction-level parallelism within a single processor. It therefore allows faster CPU throughput than would otherwise be possible at a given clock rate. A superscalar processor executes more than one instruction during a clock cycle by simultaneously dispatching multiple instructions to redundant functional units on the processor. Each functional unit is not a separate CPU core but an execution resource within a single CPU such as an arithmetic logic unit, a bit shifter, or a multiplier. While a superscalar CPU is typically also pipelined, they are two different performance enhancement techniques.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! In computing, protected mode, also called protected virtual address mode, is an operational mode of x86-compatible central processing units (CPU). It allows system software to utilize features such as virtual memory, paging, safe multi-tasking, and other features designed to increase an operating system's control over application software. When a processor that supports x86 protected mode is powered on, it begins executing instructions in real mode, in order to maintain backwards compatibility with earlier x86 processors. Protected mode may only be entered after the system software sets up several descriptor tables and enables the Protection Enable (PE) bit in the Control Register 0 (CR0).

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. A skilled martial artist, Snapdragon was hired to defeat the Black Widow in Japan. She succeeded on her mission, but Black Widow soon regained her composure and quickly dispatched Snapdragon. Later, Snapdragon joined Superia''s Femizons and became one of her lieutenants. There, she found long-time enemy Diamondback. The two were trained by Anaconda in Taskmaster''s Academy, but Diamondback had subsequently dishonored Snapdragon in some form. While on the S.S. Superia cruise ship, Snapdragon apprehended Diamondback and threw her off, leaving her to drown. Diamondback eventually recovered and received the super-soldier serum in one of her misadventures, and during their rematch, choked Snapdragon to death. Her body was returned to Japan and cremated by her brother, Kono. Later, the name Snapdragon was taken by Rachael Leighton after she began working for Superia as payment for finding a cure for the glitch in the super-soldier serum.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. Qcow2 is a QEMU disk image format. As its name implies, it is a Copy-on-write format. QEMU can use a base image which is read-only, and store all writes to the qcow2 image. Among the QEMU supported formats, this is the most versatile format. Use it to have smaller images (useful if your filesystem does not support holes, for example on FAT32), optional AES encryption, zlib based compression and support of multiple VM snapshots. Copy-on-write (sometimes referred to as 'COW') is an optimization strategy used in computer programming. The fundamental idea is that if multiple callers ask for resources which are initially indistinguishable, they can all be given pointers to the same resource. This function can be maintained until a caller tries to modify its 'copy' of the resource, at which point a true private copy is created to prevent the changes becoming visible to everyone else. All of this happens transparently to the callers. The primary advantage is that if a caller never makes any modifications, no private copy need ever be created.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. Htop is an advanced, interactive system monitor process viewer written for Linux. It is designed to replace the Unix program top. It shows a frequently updated list of the processes running on a computer, normally ordered by the amount of CPU usage. Unlike ''top'', Htop provides a full list of processes running, instead of the top resource consuming processes. Htop also uses color and gives visual information about processor, swap and memory status.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! The NEC V20 ( PD70108) was a processor made by NEC that was a reverse-engineered, pin-compatible version of the Intel 8088 with an instruction set compatible with the Intel 80186. The chip featured approximately 29,000 transistors, ran at 8 to 16 MHz and was around 30% faster (application dependent) than the 8088 at the same clock speed, primarily due to a hardware multiplier (whereas the 8088 had to perform multiplication using a microcode program). NEC V20 was used in 'turbo' versions of some PC clones such as Commodore PC compatible systems, Copam, and Tandy 1110 laptop series. Also used in the Casio PV-S450 PDA. Sony also produced this microprocessor under license from NEC as the V20H (Sony CXQ70108).

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! The PMI-80 was a primitive single-board microcomputer produced by Tesla Pie any, Czechoslovakia, since 1982. It was based on the MHB 8080A CPU (a Tesla clone of the Intel 8080), clocked at 1 MHz. Instead of a monitor output, it had a nine-digit seven-segment red LED display showing hexadecimal numbers. The keyboard was a 25-key calculator-type keypad with hex and function keys. The PMI-80 had 1 KB of RAM and the same amount of ROM. An I/O card with a DA-converter and one 0 12 V analog output could be connected.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! Output compare is the ability to trigger an output based on a timestamp in memory, without interrupting the execution of code by a processor or microcontroller. This is a functionality provided by many embedded systems. The corresponding ability to record a timestamp in memory when an input occurs is called input capture. The corresponding ability to record a timestamp in memory when an input occurs is called input capture.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! A wait state is a delay experienced by a computer processor when accessing external memory or another device that is slow to respond.As of late 2007, computer microprocessors run at very high speeds, while memory technology does not seem to be able to catch up: typical PC processors like the Intel Core 2 and the AMD Athlon 64 X2 run with a clock of several GHz, while the main memory clock generally ranges from 667 to 1333 MHz. Some second-level CPU caches run slower than the processor core.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. In computing and computer networking, safe semantics describes the guarantees provided by a data register shared by several processors in a parallel machine or in a network of computers working together. Safe semantics are defined formally in Lamport''s 'On Interprocess Communication', published in Distributed Computing 1, 2 (1986), 77 101. (This also appeared as SRC Research Report 8.) Safe semantics are defined for a variable with a single writer but multiple readers. These semantics are weak: they only guarantee that there is a total ordering of the writes and that a read which is not concurrent with any write will return the latest value. If a write is concurrent with the read then any value can be returned (for example, if a variable had value 5 and was being changed to 6 during the read, the read function could return 8). The only exception is that values which could not be held by the variable must not be returned; for example, if the variable can hold values between 0 and 255 then the read function must never return 257.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! Ganglia is a scalable distributed system monitor tool for high-performance computing systems such as clusters and grids. It allows the user to remotely view live or historical statistics (such as CPU load averages or network utilization) for all machines that are being monitored.It is based on a hierarchical design targeted at federations of clusters. It relies on a multicast-based listen/announce protocol to monitor state within clusters and uses a tree of point-to-point connections amongst representative cluster nodes to federate clusters and aggregate their state. It leverages widely used technologies such as XML for data representation, XDR for compact, portable data transport, and RRDtool for data storage and visualization.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! In computing, plug and play is a term used to describe the characteristic of a computer bus, or device specification, which facilitates the discovery of a hardware component in a system, without the need for physical device configuration, or user intervention in resolving resource conflicts. Plug and play refers to both the traditional boot-time assignment of device resources and driver identification, as well as to hotplug systems such as USB and Firewire.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! CoreMark is a free benchmark application that targets the central processing unit (CPU) core. It was developed by Shay Gal-On and released as an industry standard by EEMBC in 2009. CoreMark's primary goals are simplicity and providing a method for testing only a processor's core features. Each iteration of CoreMark performs the following algorithms: list processing (find and sort), Matrix (mathematics) manipulation (common matrix operations), state machine (determine if an input stream contains valid numbers), and CRC.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - High Quality Content by WIKIPEDIA articles! HP-UX (Hewlett Packard UniX) is Hewlett-Packard's proprietary implementation of the UNIX operating system, based on System V (initially System III). It runs on the HP 9000 PA-RISC-based range of processors and HP Integrity Intel's Itanium-based systems, and was also available for later Apollo/Domain systems. Earlier versions also ran on the HP 9000 Series 200, 300, and 400 computer systems based on the Motorola 68000 series of processors, as well as the HP 9000 Series 500 computers based on HP's proprietary FOCUS processor architecture. HP-UX was the first Unix to offer access control lists for file access permissions as an alternative to the standard Unix permissions system. HP-UX was also among the first Unix systems to include a built-in logical volume manager. HP has had a long partnership with Veritas Software, and uses VxFS as the primary file system. HP-UX 11i is currently cre.

Taschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Please note that the content of this book primarily consists of articles available from Wikipedia or other free sources online. The XAP processor is a RISC processor architecture developed by Cambridge Consultants Ltd since 1994. XAP processors are a family of 16-bit and 32-bit cores, all of which are intended for use in an application-specific integrated circuit or ASIC chip design. XAP processors were designed for use in mixed-signal integrated circuits for sensor or wireless applications including Bluetooth, ZigBee, GPS, RFID or Near Field Communication chips. Typically these integrated circuits are used in low cost, high volume products that are battery-powered and must have low energy consumption. There are other applications where XAP processors have been used to good effect, such as wireless sensor networks and medical devices, e.g. hearing aids.