Edité par Tudpress Verlag Der Wissenschaften Gmbh, Tudpress Verlag Der Wissenschaften Gmbh Aug 2013, 2013
ISBN 10 : 3944331206 ISBN 13 : 9783944331201
Langue: anglais
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Ajouter au panierTaschenbuch. Etat : Neu. Neuware -Heterogeneous multiprocessor systems-on-chip (MPSoCs) are key components of modern electronic systems. Future MPSoCs feature a globally asynchronous locally synchronous (GALS) clocking architecture and advanced power management functionality, as for example fine-grained ultra-fast dynamic voltage and frequency scaling (DVFS). Data is transmitted between system cores using high-speed serial links within a packet based network-on-chip (NoC). In this work concepts and circuits for local clock generation in heterogeneous GALS MPSoCs are developed with special focus on the clocking demands of power management and NoC. The clock generators are to be instantiated individually per processor core. For this purpose ultra compact all digital phaselocked loop (ADPLL) frequency synthesizers are developed that provide low jitter clocks, allow fast lock-in and enable instantaneous changes of the output clock frequency. The circuits are implemented in 65nm and 28nm CMOS technologies.Books on Demand GmbH, Überseering 33, 22297 Hamburg 236 pp. Englisch.
Edité par TUDpress Verlag der Wissenschaften GmbH, 2013
ISBN 10 : 3944331206 ISBN 13 : 9783944331201
Langue: anglais
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Ajouter au panierEtat : Hervorragend. Zustand: Hervorragend | Sprache: Englisch | Produktart: Bücher.
Edité par Tudpress Verlag Der Wissenschaften Gmbh Aug 2013, 2013
ISBN 10 : 3944331206 ISBN 13 : 9783944331201
Langue: anglais
Vendeur : BuchWeltWeit Ludwig Meier e.K., Bergisch Gladbach, Allemagne
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Ajouter au panierTaschenbuch. Etat : Neu. This item is printed on demand - it takes 3-4 days longer - Neuware -Heterogeneous multiprocessor systems-on-chip (MPSoCs) are key components of modern electronic systems. Future MPSoCs feature a globally asynchronous locally synchronous (GALS) clocking architecture and advanced power management functionality, as for example fine-grained ultra-fast dynamic voltage and frequency scaling (DVFS). Data is transmitted between system cores using high-speed serial links within a packet based network-on-chip (NoC). In this work concepts and circuits for local clock generation in heterogeneous GALS MPSoCs are developed with special focus on the clocking demands of power management and NoC. The clock generators are to be instantiated individually per processor core. For this purpose ultra compact all digital phaselocked loop (ADPLL) frequency synthesizers are developed that provide low jitter clocks, allow fast lock-in and enable instantaneous changes of the output clock frequency. The circuits are implemented in 65nm and 28nm CMOS technologies. 236 pp. Englisch.
Edité par TUDpress Verlag der Wissenschaften GmbH, 2013
ISBN 10 : 3944331206 ISBN 13 : 9783944331201
Langue: anglais
Vendeur : moluna, Greven, Allemagne
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Ajouter au panierKartoniert / Broschiert. Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Heterogeneous multiprocessor systems-on-chip (MPSoCs) are key components of modern electronic systems. Future MPSoCs feature a globally asynchronous locally synchronous (GALS) clocking architecture and advanced power management functionality, as for example.
Edité par Tudpress Verlag Der Wissenschaften Gmbh
ISBN 10 : 3944331206 ISBN 13 : 9783944331201
Langue: anglais
Vendeur : AHA-BUCH GmbH, Einbeck, Allemagne
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Ajouter au panierTaschenbuch. Etat : Neu. nach der Bestellung gedruckt Neuware - Printed after ordering - Heterogeneous multiprocessor systems-on-chip (MPSoCs) are key components of modern electronic systems. Future MPSoCs feature a globally asynchronous locally synchronous (GALS) clocking architecture and advanced power management functionality, as for example fine-grained ultra-fast dynamic voltage and frequency scaling (DVFS). Data is transmitted between system cores using high-speed serial links within a packet based network-on-chip (NoC). In this work concepts and circuits for local clock generation in heterogeneous GALS MPSoCs are developed with special focus on the clocking demands of power management and NoC. The clock generators are to be instantiated individually per processor core. For this purpose ultra compact all digital phaselocked loop (ADPLL) frequency synthesizers are developed that provide low jitter clocks, allow fast lock-in and enable instantaneous changes of the output clock frequency. The circuits are implemented in 65nm and 28nm CMOS technologies.
Vendeur : preigu, Osnabrück, Allemagne
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Ajouter au panierTaschenbuch. Etat : Neu. Clock Generator Circuits for Low-Power Heterogeneous Multiprocessor Systems-on-Chip | Sebastian Höppner | Taschenbuch | 236 S. | Englisch | 2013 | TUDpress | EAN 9783944331201 | Verantwortliche Person für die EU: TUDpress, Hüblerstr. 26, 01309 Dresden, mail[at]thelem[dot]de | Anbieter: preigu Print on Demand.