Formal methods computer aided design (87 résultats)

Paperback. Etat : Very Good. Sorry, No international shipping on this item.Ex-library paperback in very nice condition with the usual markings and attachments. Text block clean and unmarked. Tight binding.

Etat : Good. 1996th Edition. Former library copy. Pages intact with minimal writing/highlighting. The binding may be loose and creased. Dust jackets/supplements are not included. Includes library markings. Stock photo provided. Product includes identifying sticker. Better World Books: Buy Books. Do Good.…

Etat : good. Book shows general signs of use and handling. May have light wear on the cover or edges and minimal writing or highlighting. Binding remains tight, and pages are clean and readable.

Etat : Good. Former library copy. Pages intact with minimal writing/highlighting. The binding may be loose and creased. Dust jackets/supplements are not included. Includes library markings. Stock photo provided. Product includes identifying sticker. Better World Books: Buy Books. Do Good.

Etat : Good. 2002nd Edition. Former library copy. Pages intact with minimal writing/highlighting. The binding may be loose and creased. Dust jackets/supplements are not included. Includes library markings. Stock photo provided. Product includes identifying sticker. Better World Books: Buy Books. Do Good.…

Etat : New.

Etat : New.

Paperback or Softback. Etat : New. Formal Methods in Computer-Aided Design: First International Conference, Fmcad '96, Palo Alto, Ca, Usa, November 6 - 8, 1996, Proceedings. Book.

Etat : As New. Unread book in perfect condition.

Etat : As New. Unread book in perfect condition.

Etat : New.

Etat : As New. Unread book in perfect condition.

Etat : As New. Unread book in perfect condition.

Etat : New.

Etat : New.

Etat : New. In English.

Etat : New.

Etat : As New. Unread book in perfect condition.

Etat : New.

Etat : New.

Etat : New.

Etat : New. In English.

Etat : New. In English.

Etat : New. In English.

Etat : As New. Unread book in perfect condition.

Etat : As New. Unread book in perfect condition.

Etat : As New. Unread book in perfect condition.

Paperback. Etat : New. Sorry, No international shipping on this item.Paperback. New. Sealed. Clean, tight and unmarked.

Taschenbuch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - Minimalist Proof Assistants: Interactions of Technology and Methodology in Formal System Level Verification.- Reducing Manual Abstraction in Formal Verification of Out- of- Order Execution.- Bit-Level Abstraction in the Verification of Pipelined Microprocessors by Correspondence Checking.- Solving Bit-Vector Equations.- The Formal Design of 1M-Gate ASICs.- Design of Experiments for Evaluation of BDD Packages Using Controlled Circuit Mutations.- A Tutorial on Stålmarck's Proof Procedure for Propositional Logic.- Almana: A BDD Minimization Tool Integrating Heuristic and RewritingMethods.- Bisimulation Minimization in an Automata-Theoretic Verification Framework.- Automatic Verification of Mixed-Level Logic Circuits.- A Timed Automaton-Based Method for Accurate Computation of Circuit Delay in the Presence of Cross-Talk.- Maximum Time Separation of Events in Cyclic Systems with Linear and Latest Timing Constraints.- Using MTBDDs for Composition and Model Checking of Real-Time Systems.- Formal Methods in CAD from an Industrial Perspective.- A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool.- Combined Formal Post- and Presynthesis Verification in High Level Synthesis.- Formalization and Proof of a Solution to the PCI 2.1 Bus Transaction Ordering Problem.- A Performance Study of BDD-Based Model Checking.- Symbolic Model Checking Visualization.- Input Elimination and Abstraction in Model Checking.- Symbolic Simulation of the JEM1 Microprocessor.- Symbolic Simulation: An ACL2 Approach.- Verification of Data-Insensitive Circuits: An In-Order-Retirement Case Study.- Combining Symbolic Model Checking with Uninterpreted Functions for Out-of-Order Processor Verification.- Formally Verifying Data and Controlwith Weak Reachability Invariants.- Generalized Reversible Rules.- An Assume-Guarantee Rule for Checking Simulation.- Three Approaches to Hardware Verification: HOL, MDG, and VIS Compared.- An Instruction Set Process Calculus.- Techniques for Implicit State Enumeration of EFSMs.- Model Checking on Product Structures.- BDDNOW: A Parallel BDD Package.- Model Checking VHDL with CV.- Alexandria: A Tool for Hierarchical Verification.- PV: An Explicit Enumeration Model-Checker.…

Taschenbuch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - Challenges in System-Level Design.- Generating Fast Multipliers Using Clever Circuits.- Verification of Analog and Mixed-Signal Circuits Using Hybrid System Techniques.- A Methodology for the Formal Verification of FFT Algorithms in HOL.- A Functional Approach to the Formal Specification of Networks on Chip.- Proof Styles in Operational Semantics.- Integrating Reasoning About Ordinal Arithmetic into ACL2.- Combining Equivalence Verification and Completion Functions.- Synchronization-at-Retirement for Pipeline Verification.- Late Design Changes (ECOs) for Sequentially Optimized Esterel Designs.- Non-miter-based Combinational Equivalence Checking by Comparing BDDs with Different Variable Orders.- Scalable Automated Verification via Expert-System Guided Transformations.- Simple Yet Efficient Improvements of SAT Based Bounded Model Checking.- Simple Bounded LTL Model Checking.- QuBE++: An Efficient QBF Solver.- Bounded Probabilistic Model Checking with the Mur Verifier.- Increasing the Robustness of Bounded Model Checking by Computing Lower Bounds on the Reachable States.- Bounded Verification of Past LTL.- A Hybrid of Counterexample-Based and Proof-Based Abstraction.- Memory Efficient All-Solutions SAT Solver and Its Application for Reachability Analysis.- Approximate Symbolic Model Checking for Incomplete Designs.- Extending Extended Vacuity.- Parameterized Vacuity.- An Operational Semantics for Weak PSL.- Accepting Predecessors Are Better than Back Edges in Distributed LTL Model-Checking.- Bloom Filters in Probabilistic Verification.- A Simple Method for Parameterized Verification of Cache Coherence Protocols.- A Partitioning Methodology for BDD-Based Verification.- Invariant Checking Combining Forward and Backward Traversal.- Variable Reuse for Efficient ImageComputation.…