Gate stack silicide issues par clevenger (14 résultats)

Hardback. Etat : Excellent condition. Etat de la jaquette : No dust jacket, as issued. 1 v. (varous pagings) ill. 24 cm. a few numbers written on title page.

Etat : New.

Etat : New.

Etat : New. In English.

Etat : New. pp. 254.

Etat : New.

Taschenbuch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - As the feature size of microelectronic devices approaches the deep submicron regime, the process development and integration issues related to gate stack and silicide processing are key challenges. Gate leakage is rising due to direct tunneling. Power and reliability concerns are expected to limit the ultimate scaling of SiO2-based insulators to about 1.5nm. Gate insulators must not deleteriously affect the interface quality, thermal stability, charge trapping, or process integration. Metal gate materials and damascene gates are being investigated, in conjunction with the application of a high-permittivity gate insulator, to provide sufficient device performance at ULSI dimensions. The silicidation process is also coming under pressure. Narrow device widths and decreasing junction depths are making the formation of low-leakage, low-resistance silicide straps extremely difficult. Producing shallower junctions via ion implantation is inhibited by transient enhanced diffusion and low beam currents at low implantation energies. Gate stack and contact film effects, such as point defect injection, extended defect formation, and stress on ultrashallow junction formation must be considered.…

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Paperback / softback. Etat : New. This item is printed on demand. New copy - Usually dispatched within 5-9 working days.

Etat : New. Print on Demand pp. 254.

Etat : New. PRINT ON DEMAND pp. 254.

Paperback. Etat : new. Paperback. As the feature size of microelectronic devices approaches the deep submicron regime, the process development and integration issues related to gate stack and silicide processing are key challenges. Gate leakage is rising due to direct tunneling. Power and reliability concerns are expected to limit the ultimate scaling of SiO2-based insulators to about 1.5nm. Gate insulators must not deleteriously affect the interface quality, thermal stability, charge trapping, or process integration. Metal gate materials and damascene gates are being investigated, in conjunction with the application of a high-permittivity gate insulator, to provide sufficient device performance at ULSI dimensions. The silicidation process is also coming under pressure. Narrow device widths and decreasing junction depths are making the formation of low-leakage, low-resistance silicide straps extremely difficult. Producing shallower junctions via ion implantation is inhibited by transient enhanced diffusion and low beam currents at low implantation energies. Gate stack and contact film effects, such as point defect injection, extended defect formation, and stress on ultrashallow junction formation must be considered. The MRS Symposium Proceeding series is an internationally recognised reference suitable for researchers and practitioners. This item is printed on demand. Shipping may be from our UK warehouse or from our Australian or US warehouses, depending on stock availability.…

Etat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. The MRS Symposium Proceeding series is an internationally recognised reference suitable for researchers and practitioners.KlappentextThe MRS Symposium Proceeding series is an internationally recognised reference suitable for research.…

Taschenbuch. Etat : Neu. Gate Stack and Silicide Issues in Silicon Processing | Volume 611 | L. A. Clevenger (u. a.) | Taschenbuch | Kartoniert / Broschiert | Englisch | 2012 | Cambridge University Press | EAN 9781107413160 | Verantwortliche Person für die EU: Libri GmbH, Europaallee 1, 36244 Bad Hersfeld, gpsr[at]libri[dot]de | Anbieter: preigu Print on Demand.…