Seng pan (51 résultats)

hardcover. Etat : Very Good. Most items will be dispatched the same or the next working day. A copy that has been read, but is in excellent condition. Pages are intact and not marred by notes or highlighting. The spine remains undamaged.

Wraps. Etat : vg+. Oversize paperback. 142pp Exhibition catalogue. A very nice copy. Hao & Shenyan, Fan & Fan, Li & Bingyaun, Pan & Peng Yim Chee; Photographers Jianquin (illustrateur).

Etat : New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.

Etat : Used. pp. 260.

Etat : Used. pp. 260 Figure, 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.

Etat : Used. pp. 260, Abbreviations Acknowledgements.

Etat : New.

Etat : New. This is a Brand-new US Edition. This Item may be shipped from US or any other country as we have multiple locations worldwide.

Etat : As New. Unread book in perfect condition.

Etat : As New. Unread book in perfect condition.

Etat : New. A brand new book in pristine condition. Showing zero signs of shelf wear, creases, or damage.

Etat : New.

Etat : New.

Etat : New.

Etat : New.

Etat : New.

Etat : As New. Unread book in perfect condition.

Etat : New.

Etat : Used. pp. 204.

Etat : New. pp. 202.

Etat : New. pp. 152.

Buch. Etat : Neu. Druck auf Anfrage Neuware - Printed after ordering - The prospect of initializing a network-ubiquitous society in the years to come has led to the development of multistandard-compliant wireless transceivers for seamless roaming among multiple networks. To ensure a commercial success of such a development, the manufacturing cost and power consumption of the system chips have to be minimized. The use of an advanced technology and a high level of integration have continued to be the most effective ways for cost and power minimization, given that wireless chips integrate large amounts of digital logic for computation. Regrettably, entering into the nanoelectronics era, the thinner transistor gate oxide implicates great challenges in the design of the analog front-ends. While a low-voltage supply is imposed to maintain device reliability, a relatively large threshold voltage is also necessitated to limit the leakage current. Thus, transceiver architectures and circuits which will befit future full integration of multistandard wireless transceivers in sub-1V nanoscale CMOS processes must be highly reconfigurable and robustly operational underneath a l- voltage supply. This book presents novel analog-baseband architectures and circuits that help realizing multistandard and low-voltage wireless transceivers. The main contents are presented from Chapter 2 to Chapter 6, as pictorially outlined in Figure 1. Chapter 1 overviews the current wireless-IC developments and presents the motivation and research objectives of this book. xi xii Preface Figure 1.…

Etat : Used. pp. 204 52:B&W 6.14 x 9.21in or 234 x 156mm (Royal 8vo) Case Laminate on White w/Gloss Lam.

Etat : New. pp. 260.

Paperback. Etat : Brand New. 227 pages. 9.00x6.00x0.50 inches. In Stock.

Hardcover. Etat : Brand New. 2011 edition. 150 pages. 9.25x6.25x0.50 inches. In Stock.

Taschenbuch. Etat : Neu. Design of Very High-Frequency Multirate Switched-Capacitor Circuits | Extending the Boundaries of CMOS Analog Front-End Filtering | Ben U Seng Pan (u. a.) | Taschenbuch | The Springer International Series in Engineering and Computer Science | xxxii | Englisch | 2010 | Springer | EAN 9781441938671 | Verantwortliche Person für die EU: Springer Verlag GmbH, Tiergartenstr. 17, 69121 Heidelberg, juergen[dot]hartmann[at]springer[dot]com | Anbieter: preigu.…

Etat : Used. pp. 204.

Gebundene Ausgabe. Etat : Neu. Neu Neuware, Importqualität, auf Lager, Sofortversand - Analog-to-Digital Converters (ADCs) play an important role in most modern signal processing and wireless communication systems where extensive signal manipulation is necessary to be performed by complicated digital signal processing (DSP) circuitry. This trend also creates the possibility of fabricating all functional blocks of a system in a single chip (System On Chip - SoC), with great reductions in cost, chip area and power consumption. However, this tendency places an increasing challenge, in terms of speed, resolution, power consumption, and noise performance, in the design of the front-end ADC which is usually the bottleneck of the whole system, especially under the unavoidable low supply-voltage imposed by technology scaling, as well as the requirement of battery operated portable devices. Generalized Low-Voltage Circuit Techniques for Very High-Speed Time-Interleaved Analog-to-Digital Converters will present new techniques tailored for low-voltage and high-speed Switched-Capacitor (SC) ADC with various design-specific considerations.…

Etat : As New. Unread book in perfect condition.