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Edité par Springer International Publishing AG, Cham, 2014
ISBN 10 : 3319032208 ISBN 13 : 9783319032207
Langue: anglais
Vendeur : Grand Eagle Retail, Bensenville, IL, Etats-Unis
EUR 138,26
Autre deviseQuantité disponible : 1 disponible(s)
Ajouter au panierHardcover. Etat : new. Hardcover. This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection. It is an invaluable reference for anyone developing systems-on-chip (SoC) and systems-on-package (SoP), integrated with system-level ESD protection. The book focuses on both the design of semiconductor integrated circuit (IC) components with embedded, on-chip system level protection and IC-system co-design. The readers will be enabled to bring the system level ESD protection solutions to the level of integrated circuits, thereby reducing or completely eliminating the need for additional, discrete components on the printed circuit board (PCB) and meeting system-level ESD requirements. The authors take a systematic approach, based on IC-system ESD protection co-design. A detailed description of the available IC-level ESD testing methods is provided, together with a discussion of the correlation between IC-level and system-level ESD testing methods. The IC-level ESD protection design is demonstrated with representative case studies which are analyzed with various numerical simulations and ESD testing. The overall methodology for IC-system ESD co-design is presented as a step-by-step procedure that involves both ESD testing and numerical simulations. This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection. Shipping may be from multiple locations in the US or from the UK, depending on stock availability.
EUR 136,12
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Ajouter au panierEtat : New. pp. 340.
EUR 144,02
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EUR 125,65
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Ajouter au panierPaperback. Etat : Brand New. reprint edition. 340 pages. 9.25x6.10x0.80 inches. In Stock.
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Ajouter au panierHardcover. Etat : Brand New. 2014 edition. 320 pages. 9.25x6.25x1.00 inches. In Stock.
Edité par Springer International Publishing, 2014
ISBN 10 : 3319032208 ISBN 13 : 9783319032207
Langue: anglais
Vendeur : moluna, Greven, Allemagne
EUR 128,35
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Ajouter au panierGebunden. Etat : New. Provides a systematic approach to on-chip ESD protection for system-level IC pinsDescribes a system-level co-design methodology, which uses external system level ESD protection components, together with on-chip ESD protection structureInclu.
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Edité par Springer International Publishing AG, Cham, 2014
ISBN 10 : 3319032208 ISBN 13 : 9783319032207
Langue: anglais
Vendeur : AussieBookSeller, Truganina, VIC, Australie
EUR 341,71
Autre deviseQuantité disponible : 1 disponible(s)
Ajouter au panierHardcover. Etat : new. Hardcover. This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection. It is an invaluable reference for anyone developing systems-on-chip (SoC) and systems-on-package (SoP), integrated with system-level ESD protection. The book focuses on both the design of semiconductor integrated circuit (IC) components with embedded, on-chip system level protection and IC-system co-design. The readers will be enabled to bring the system level ESD protection solutions to the level of integrated circuits, thereby reducing or completely eliminating the need for additional, discrete components on the printed circuit board (PCB) and meeting system-level ESD requirements. The authors take a systematic approach, based on IC-system ESD protection co-design. A detailed description of the available IC-level ESD testing methods is provided, together with a discussion of the correlation between IC-level and system-level ESD testing methods. The IC-level ESD protection design is demonstrated with representative case studies which are analyzed with various numerical simulations and ESD testing. The overall methodology for IC-system ESD co-design is presented as a step-by-step procedure that involves both ESD testing and numerical simulations. This book addresses key aspects of analog integrated circuits and systems design related to system level electrostatic discharge (ESD) protection. Shipping may be from our Sydney, NSW warehouse or from our UK or US warehouse, depending on stock availability.
Edité par Springer International Publishing, 2016
ISBN 10 : 3319348922 ISBN 13 : 9783319348926
Langue: anglais
Vendeur : moluna, Greven, Allemagne
EUR 72,89
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Ajouter au panierEtat : New. Dieser Artikel ist ein Print on Demand Artikel und wird nach Ihrer Bestellung fuer Sie gedruckt. Provides a systematic approach to on-chip ESD protection for system-level IC pinsDescribes a system-level co-design methodology, which uses external system level ESD protection components, together with on-chip ESD protection structureInclu.
Vendeur : Revaluation Books, Exeter, Royaume-Uni
EUR 143,85
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Ajouter au panierHardcover. Etat : Brand New. 2014 edition. 320 pages. 9.25x6.25x1.00 inches. In Stock. This item is printed on demand.
Vendeur : Majestic Books, Hounslow, Royaume-Uni
EUR 177,69
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Ajouter au panierEtat : New. Print on Demand pp. 338.
Vendeur : Biblios, Frankfurt am main, HESSE, Allemagne
EUR 180,83
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Ajouter au panierEtat : New. PRINT ON DEMAND pp. 338.